代码1功能1.docx
- 文档编号:7334693
- 上传时间:2023-01-23
- 格式:DOCX
- 页数:19
- 大小:17.92KB
代码1功能1.docx
《代码1功能1.docx》由会员分享,可在线阅读,更多相关《代码1功能1.docx(19页珍藏版)》请在冰豆网上搜索。
代码1功能1
代码1功能:
通过sw控制LED灯
moduletest001(SW,LEDR,LEDG);
input[17:
0]SW;//sw[17]
output[17:
0]LEDR;
outputreg[7:
0]LEDG;
//assignLEDRG[7:
3]=5'B00000;
assignLEDR=SW;
always@(SW)
begin
case(SW[17:
15])
3'b000:
LEDG=SW[2:
0];
3'b001:
LEDG=SW[5:
3];
3'b010:
LEDG=SW[8:
6];
3'b011:
LEDG=SW[11:
9];
3'b100:
LEDG=SW[14:
12];
default:
LEDG=8'B00000000;
endcase
end
endmodule
代码2:
sw输入两个8位数,乘积在7段管上显示
moduletest004(SW,HEX0,HEX1,HEX2,HEX3,HEX4,HEX5,HEX6,HEX7);
input[17:
0]SW;
output[6:
0]HEX0,HEX1,HEX2,HEX3,HEX4,HEX5,HEX6,HEX7;
wire[15:
0]mult;
assignmult=SW[15:
8]*SW[7:
0];
assign{HEX7,HEX6,HEX5,HEX4}={decodeout(SW[7:
4]),decodeout(SW[3:
0]),decodeout(SW[15:
12]),decodeout(SW[11:
8])};
assign{HEX3,HEX2,HEX1,HEX0}={decodeout(mult[15:
12]),decodeout(mult[11:
8]),decodeout(mult[7:
4]),decodeout(mult[3:
0])};
function[6:
0]decodeout;
input[3:
0]ina;
case(ina)
4'b0000:
decodeout=7'b1000000;//0
4'b0001:
decodeout=7'b1111001;
4'b0010:
decodeout=7'b0100100;
4'b0011:
decodeout=7'b0110000;
4'b0100:
decodeout=7'b0011001;
4'b0101:
decodeout=7'b0010010;
4'b0110:
decodeout=7'b0000010;
4'b0111:
decodeout=7'b1111000;
4'b1000:
decodeout=7'b0000000;
4'b1001:
decodeout=7'b0010000;//9
4'b1010:
decodeout=7'b0001000;//a
4'b1011:
decodeout=7'b0000011;//b
4'b1100:
decodeout=7'b1000110;//c
4'b1101:
decodeout=7'b0100001;//d
4'b1110:
decodeout=7'b0000110;//e
4'b1111:
decodeout=7'b0001110;//f
default:
decodeout=7'b1111111;
endcase
endfunction
endmodule
代码3:
sw输入16位数,以十进制在7段管上显示
moduletest003(SW,HEX7,HEX6,HEX5,HEX4,HEX3,HEX2,HEX1,HEX0);
input[17:
0]SW;
output[6:
0]HEX7,HEX6,HEX5,HEX4,HEX3,HEX2,HEX1,HEX0;
assignHEX0=decodeout(SW%18'd10);
assignHEX1=decodeout((SW/18'd10)%18'd10);
assignHEX2=decodeout((SW/18'd100)%18'd10);
assignHEX3=decodeout((SW/18'd1000)%18'd10);
assignHEX4=decodeout((SW/18'd10000)%18'd10);
assignHEX5=decodeout((SW/18'd100000)%18'd10);
assignHEX6=decodeout((SW/28'd1000000)%18'd10);
assignHEX7=decodeout((SW/28'd10000000)%18'd10);
function[6:
0]decodeout;
input[3:
0]indec;
case(indec)//用case语句进行译码
4'd0:
decodeout=7'b1000000;
4'd1:
decodeout=7'b1111001;
4'd2:
decodeout=7'b0100100;
4'd3:
decodeout=7'b0110000;
4'd4:
decodeout=7'b0011001;
4'd5:
decodeout=7'b0010010;
4'd6:
decodeout=7'b0000010;
4'd7:
decodeout=7'b1111000;
4'd8:
decodeout=7'b0000000;
4'd9:
decodeout=7'b0010000;
default:
decodeout=7'b1111111;
endcase
endfunction
endmodule
代码4:
sw控制hello显示
moduletest002(SW,HEX0,HEX1,HEX2,HEX3,HEX4);
input[17:
0]SW;
outputreg[6:
0]HEX0,HEX1,HEX2,HEX3,HEX4;
always@(SW)
begin
case(SW[17:
15])
3'b000:
{HEX4,HEX3,HEX2,HEX1,HEX0}=35'B0001001_0000110_1000111_1000111_1000000;
3'b001:
{HEX4,HEX3,HEX2,HEX1,HEX0}=35'B0000110_1000111_1000111_1000000_0001001;
3'b010:
{HEX4,HEX3,HEX2,HEX1,HEX0}=35'B1000111_1000111_1000000_0001001_0000110;
3'b011:
{HEX4,HEX3,HEX2,HEX1,HEX0}=35'B1000111_1000000_0001001_0000110_1000111;
3'b100:
{HEX4,HEX3,HEX2,HEX1,HEX0}=35'B1000000_0001001_0000110_1000111_1000111;
default:
{HEX4,HEX3,HEX2,HEX1,HEX0}=35'B1111111_1111111_1111111_1111111_1111111;
endcase
end
endmodule
代码5:
状态机检测101序列,注意此代码使用3个状态实现,与课本上四状态有区别
moduletest0002(clk,clr,x,z);
inputclk,clr,x;
outputregz;
reg[1:
0]state,next_state;
parameters0=2'b00,s1=2'b01,s2=2'b10;
always@(posedgeclkorposedgeclr)
begin
if(clr)state<=s0;
elsestate<=next_state;
end
always@(stateorx)
begin
case(state)
s0:
if(x)next_state<=s1;elsenext_state<=s0;
s1:
if(x)next_state<=s1;elsenext_state<=s2;
s2:
if(x)next_state<=s1;elsenext_state<=s0;
endcase
end
always@(stateorx)
begin
case(state)
s2:
if(x)z=1;elsez=0;
default:
z=0;
endcase
//else
//case(state)
//s0:
beginif(x)state<=s1;elsestate<=s0;z=0;end
//s1:
beginif(x)state<=s1;elsestate<=s2;z=0;end
//s2:
beginif(x)beginstate<=s1;z=1;endelsebeginstate<=s0;z=0;endend
//default:
beginstate<=s0;z=0;end
//endcase
end
endmodule
代码6:
运算器任务方式实现
modulealutask(opcode,a,b,c);
input[1:
0]opcode;
input[7:
0]a,b;
outputreg[8:
0]c;
always@(aorboropcode)
begin//always
case(opcode)
2'b00:
my_and(a,b,c);
2'b01:
c=a|b;
2'b10:
c=a-b;
2'b11:
c=a+b;
default:
c=9'bx;
endcase
end//always
taskmy_and;
input[7:
0]my_a,my_b;
output[7:
0]my_c;
integeri;
for(i=0;i<=7;i=i+1)
my_c[i]=my_a[i]&my_b[i];
endtask
endmodule
代码7:
83编码器
modulecode_83(din,dout);
input[7:
0]din;
output[2:
0]dout;
function[2:
0]code;
input[7:
0]din;
casex(din)
8'b1xxx_xxxx:
code=3'h7;
8'b01xx_xxxx:
code=3'h6;
8'b001x_xxxx:
code=3'h5;
8'b0001_xxxx:
code=3'h4;
8'b0000_1xxx:
code=3'h3;
8'b0000_01xx:
code=3'h2;
8'b0000_001x:
code=3'h1;
8'b0000_000x:
code=3'h0;
default:
code=3'hx;
endcase
endfunction
assigndout=code(din);
endmodule
代码8:
函数实现非波拉切序列
modulefunct(clk,n,result,reset);
output[31:
0]result;
input[3:
0]n;
inputreset,clk;
reg[31:
0]result;
always@(posedgeclk)
begin
if(!
reset)result<=0;
elsebegin
result<=2*factorial(n);
end
end
function[31:
0]factorial;
input[3:
0]opa;
reg[3:
0]i;
begin
factorial=opa?
1:
0;
for(i=2;i<=opa;i=i+1)
factorial=i*factorial;
end
endfunction
代码9:
3过程实现101检测,fsm
moduleTEST101(CLOCK_50,HEX0,KEY);
inputCLOCK_50;
input[1:
0]KEY;
output[6:
0]HEX0;
reg[1:
0]state,next_state;
reg[3:
0]count;
reg[32:
0]temp=33'b1001010101;
parameters0=2'b00,s1=2'b01,s2=2'b11,s3=2'b10;
div_clock_1hz(CLOCK_50,CLK_1);
de_16to7seg(count,HEX0);
always@(posedgeCLK_1ornegedgeKEY[0])
begin
if(!
KEY[0])temp<=11'b;
elsetemp<=temp>>1;
end
always@(posedgeCLK_1ornegedgeKEY[0])
begin
if(!
KEY[0])state<=s0;
elsestate<=next_state;
end
always@(stateortemp[0])
begin
case(state)
s0:
if(temp[0])next_state<=s1;elsenext_state<=s0;
s1:
if(temp[0])next_state<=s1;elsenext_state<=s2;
s2:
if(temp[0])next_state<=s3;elsenext_state<=s0;
s3:
if(temp[0])next_state<=s1;elsenext_state<=s2;
default:
next_state<=s0;
endcase
end
always@(state)
begin
case(state)
s3:
count<=count+1;
endcase
end
endmodule
代码10:
三种速度的hello显示
moduletest100(KEY,CLOCK_50,HEX0,HEX1,HEX2,HEX3,HEX4,HEX5,HEX6,HEX7,LEDR);
input[1:
0]KEY;
inputCLOCK_50;
output[3:
0]LEDR;
output[6:
0]HEX0,HEX1,HEX2,HEX3,HEX4,HEX5,HEX6,HEX7;
reg[55:
0]temp=56'B1111111_1111111_11111111_0001001_0000110_1000111_1000111_1000000;
reg[1:
0]j;
assignLEDR={2'B00,j};
clock_1hz(CLOCK_50,CLK_1);
clock_025hz(CLOCK_50,CLK_025);
clock_4hz(CLOCK_50,CLK_4);
assignclock=(j==0)?
CLK_1:
((j==2)?
CLK_4:
CLK_025);
assign{HEX7,HEX6,HEX5,HEX4,HEX3,HEX2,HEX1,HEX0}=temp;
always@(KEY[0]orKEY[1])
begin
if(!
KEY[0])j=1;elsej=0;
if(!
KEY[1])j=2;elsej=0;
end
always@(posedgeclock)
begin
temp={temp,temp[55:
49]};
end
endmodule
moduleclock_1hz(clock_in,clock_out);
inputclock_in;
outputregclock_out;
integeri;
always@(posedgeclock_in)
begin
if(i==25000000)beginclock_out<=~clock_out;i<=0;end
elsei<=i+1;
end
endmodule
moduleclock_025hz(clock_in,clock_out);
inputclock_in;
outputregclock_out;
integeri;
always@(posedgeclock_in)
begin
if(i==6250000)beginclock_out<=~clock_out;i<=0;end
elsei<=i+1;
end
endmodule
moduleclock_4hz(clock_in,clock_out);
inputclock_in;
outputregclock_out;
integeri;
always@(posedgeclock_in)
begin
if(i==100000000)beginclock_out<=~clock_out;i<=0;end
elsei<=i+1;
end
endmodule
代码11:
函数实现hello显示
moduletest002(SW,HEX0,HEX1,HEX2,HEX3,HEX4,HEX5,HEX6,HEX7);
input[17:
0]SW;
outputreg[6:
0]HEX0,HEX1,HEX2,HEX3,HEX4;
output[6:
0]HEX5,HEX6,HEX7;
assign{HEX5,HEX6,HEX7}=21'B1111111_1111111_11111111;
always@(SW)
begin
case(SW[17:
15])
3'b000:
{HEX0,HEX1,HEX2,HEX3,HEX4}={decout(SW[2:
0]),decout(SW[5:
3]),decout(SW[8:
6]),decout(SW[11:
9]),decout(SW[14:
12])};
3'b001:
{HEX0,HEX1,HEX2,HEX3,HEX4}={decout(SW[5:
3]),decout(SW[8:
6]),decout(SW[11:
9]),decout(SW[14:
12]),decout(SW[2:
0])};
3'b010:
{HEX0,HEX1,HEX2,HEX3,HEX4}={decout(SW[8:
6]),decout(SW[11:
9]),decout(SW[14:
12]),decout(SW[2:
0]),decout(SW[5:
3])};
3'b011:
{HEX0,HEX1,HEX2,HEX3,HEX4}={decout(SW[11:
9]),decout(SW[14:
12]),decout(SW[2:
0]),decout(SW[5:
3]),decout(SW[8:
6])};
3'b100:
{HEX0,HEX1,HEX2,HEX3,HEX4}={decout(SW[14:
12]),decout(SW[2:
0]),decout(SW[5:
3]),decout(SW[8:
6]),decout(SW[11:
9])};
default:
{HEX4,HEX3,HEX2,HEX1,HEX0}=35'B1111111_1111111_1111111_1111111_1111111;
endcase
end
function[6:
0]decout;
input[2:
0]ina;
case(ina)
3'b000:
decout=7'b0001001;
3'b001:
decout=7'b0000110;
3'b010:
decout=7'b1000111;
3'b011:
decout=7'b1000000;
3'b100:
decout=7'b1111111;
default:
decout=7'b0001111;
endcase
endfunction
endmodule
代码12:
sw输入两个16位数,在2组7段管上显示
(1)两个数在特定位置上显示
moduletest_sx_0010(KEY,SW,HEX0,HEX1,HEX2,HEX3,HEX4,HEX5,HEX6,HEX7);
input[15:
0]SW;
input[1:
0]KEY;
output[6:
0]HEX0,HEX1,HEX2,HEX3,HEX4,HEX5,HEX6,HEX7;
reg[31:
0]temp;
regstate1;
de_16to7segA1(temp[31:
28],HEX7);
de_16to7segA2(temp[27:
24],HEX6);
de_16to7segA3(temp[23:
20],HEX5);
de_16to7segA4(temp[19:
16],HEX4);
de_16to7segA5(temp[15:
12],HEX3);
de_16to7segA6(temp[11:
8],HEX2);
de_16to7segA7(temp[7:
4],HEX1);
de_16to7segA8(temp[3:
0],HEX0);
always@(negedgeKEY[1]ornegedgeKEY[0])
begin
if(!
KEY[0])temp<=32'B0;
elseif(!
state1)temp[31:
16]<=SW;
elsetemp[15:
0]<=SW;
end
always@(negedgeKEY[1]ornegedgeKEY[0])
begin
if(!
KEY[0])state1<=0;
elsestate1<=state1+1'b1;
end
endmodule
(2)移位方式显示
moduletest_sx_001(KEY,SW,HEX0,HEX1,HEX2,HEX3,HEX4,HEX5,HEX6,HEX7);
input[15:
0]SW;
input[1:
0]KEY;
output[6:
0]HEX0,HEX1,HEX2,HEX3,HEX4,HEX5,HEX6,HEX7;
reg[31:
0]temp;
//regstate1;
de_16to7segA1(temp[31:
28],HEX7);
de_16to7segA2(temp[27:
24],HEX6);
de_16to7segA3(temp[23:
20],HEX5);
de_16to7segA4(temp[19:
16],HEX4);
de_16to7segA5(temp[15:
12],HEX3);
de_16to7segA6(temp[11:
8],HEX2);
de_16to7segA7(temp[7:
4],HEX1);
de_16to7segA8(temp[3:
0],HEX0);
always@(negedgeKEY[1]ornegedgeKEY[0])
begin
if(!
KEY[0])temp<=32'B0;
elsetemp<={temp,SW};
end
endm
- 配套讲稿:
如PPT文件的首页显示word图标,表示该PPT已包含配套word讲稿。双击word图标可打开word文档。
- 特殊限制:
部分文档作品中含有的国旗、国徽等图片,仅作为作品整体效果示例展示,禁止商用。设计者仅对作品中独创性部分享有著作权。
- 关 键 词:
- 代码 功能