msp430混合信号微控制器外文文献及翻译学位论文.docx
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msp430混合信号微控制器外文文献及翻译学位论文.docx
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msp430混合信号微控制器外文文献及翻译学位论文
本科毕业设计
外文文献及译文
文献、资料题目:
MPS430MixedSignalMicrocontroller
文献、资料来源:
期刊(著作、网络等)
文献、资料发表(出版)日期:
2005.3.25
学院:
信息与电气工程学院
专业:
通信工程
班级:
通信
姓名:
学号:
指导教师:
翻译日期:
外文文献:
MSP430MIXEDSIGNALMICROCONTROLLER
_LowSupply-VoltageRange,1.8V...3.6V
_Ultralow-PowerConsumption:
−ActiveMode:
330μAat1MHz,2.2V
−StandbyMode:
1.1μA
−OffMode(RAMRetention):
0.1μA
_FivePower-SavingModes
_Wake-UpFromStandbyModeinlessthan6μs
_16-BitRISCArchitecture,125-nsInstructionCycleTime
_Three-ChannelInternalDMA
_12-BitA/DConverterWithInternal
Reference,Sample-and-HoldandAutoscanFeature
_Dual12-BitD/AConvertersWithSynchronization
_16-BitTimer_AWithThreeCapture/CompareRegisters
_16-BitTimer_BWithThreeorSevenCapture/Compare-With-ShadowRegisters
_On-ChipComparator
_SerialCommunicationInterface(USART0),FunctionsasAsynchronousUARTorSynchronousSPIorI2CTMInterface
_SerialCommunicationInterface(USART1),FunctionsasAsynchronousUARTorSynchronousSPIInterface
_SupplyVoltageSupervisor/MonitorWithProgrammableLevelDetection
_BrownoutDetector
_BootstrapLoader
_SerialOnboardProgramming,NoExternalProgrammingVoltageNeeded
ProgrammableCodeProtectionbySecurity
Fuse
_FamilyMembersInclude:
−MSP430F155:
16KB+256BFlashMemory
512BRAM
−MSP430F156:
24KB+256BFlashMemory
1KBRAM
−MSP430F157:
32KB+256BFlashMemory,
1KBRAM
−MSP430F167:
32KB+256BFlashMemory,
1KBRAM
−MSP430F168:
48KB+256BFlashMemory,
2KBRAM
−MSP430F169:
60KB+256BFlashMemory,
2KBRAM
−MSP430F1610:
32KB+256BFlashMemory
5KBRAM
−MSP430F1611:
48KB+256BFlashMemory
10KBRAM
−MSP430F1612:
55KB+256BFlashMemory
5KBRAM
_Availablein64-PinQuadFlatPack(QFP)and64-pinQFN(seeAvailableOptions)
_ForCompleteModuleDescriptions,SeetheMSP430x1xxFamilyUser’sGuide,
LiteratureNumberSLAU049
description
TheTexasInstrumentsMSP430familyofultralowpowermicrocontrollersconsistofseveraldevicesfeaturingdifferentsetsofperipheralstargetedforvariousapplications.Thearchitecture,combinedwithfivelowpowermodesisoptimizedtoachieveextendedbatterylifeinportablemeasurementapplications.Thedevicefeaturesapowerful16-bitRISCCPU,16-bitregisters,andconstantgeneratorsthatattributetomaximumcodeefficiency.
Thedigitallycontrolledoscillator(DCO)allowswake-upfromlow-powermodestoactivemodeinlessthan6μs.
TheMSP430x15x/16x/161xseriesaremicrocontrollerconfigurationswithtwobuilt-in16-bittimers,afast12-bit
A/Dconverter,dual12-bitD/Aconverter,oneortwouniversalserialsynchronous/asynchronous
communicationinterfaces(USART),I2C,DMA,and48I/Opins.Inaddition,theMSP430x161xseriesoffers
extendedRAMaddressingformemory-intensiveapplicationsandlargeC-stackrequirements.Typicalapplicationsincludesensorsystems,industrialcontrolapplications,hand-heldmeters,etc.
MSP430F169MIXEDSIGNALMICROCONTROLLER
short-formdescription
CPU
TheMSP430CPUhasa16-bitRISCarchitecturethatishighlytransparenttotheapplication.Alloperations,otherthanprogram-flowinstructions,areperformedasregisteroperationsin
conjunctionwithsevenaddressingmodesforsourceoperandandfouraddressingmodesfor
destinationoperand.
TheCPUisintegratedwith16registersthatprovidereducedinstructionexecutiontime.Theregister-to-registeroperationexecutiontimeisonecycleoftheCPUclock.
Fouroftheregisters,R0toR3,arededicatedasprogramcounter,stackpointer,statusregister,andconstantgeneratorrespectively.Theremainingregistersaregeneral-purposeregisters.
PeripheralsareconnectedtotheCPUusingdata,address,andcontrolbuses,andcanbehandledwithallinstructions.
instructionset
Theinstructionsetconsistsof51instructionswiththreeformatsandsevenaddressmodes.Eachinstructioncanoperateonwordandbytedata.
operatingmodes
TheMSP430hasoneactivemodeandfivesoftwareselectablelow-powermodesofoperation.Aninterrupteventcanwakeupthedevicefromanyofthefivelow-powermodes,servicetherequestandrestorebacktothelow-powermodeonreturnfromtheinterruptprogram.
Thefollowingsixoperatingmodescanbeconfiguredbysoftware:
_ActivemodeAM;
−Allclocksareactive
_Low-powermode0(LPM0);
−CPUisdisabled
ACLKandSMCLKremainactive.MCLKisdisabled
_Low-powermode1(LPM1);
−CPUisdisabled
ACLKandSMCLKremainactive.MCLKisdisabled
DCO’sdc-generatorisdisabledifDCOnotusedinactivemode
_Low-powermode2(LPM2);
−CPUisdisabled
MCLKandSMCLKaredisabled
DCO’sdc-generatorremainsenabled
ACLKremainsactive
_Low-powermode3(LPM3);
−CPUisdisabled
MCLKandSMCLKaredisabled
DCO’sdc-generatorisdisabled
ACLKremainsactive
_Low-powermode4(LPM4);
−CPUisdisabled
ACLKisdisabled
MCLKandSMCLKaredisabled
DCO’sdc-generatorisdisabled
Crystaloscillatorisstopped
interruptvectoraddresses
Theinterruptvectorsandthepower-upstartingaddressarelocatedintheaddressrange0FFFFh−0FFE0h.
Thevectorcontainsthe16-bitaddressoftheappropriateinterrupt-handlerinstructionsequence
specialfunctionregisters
Mostinterruptandmodule-enablebitsarecollectedinthelowestaddressspace.Special-functionregisterbitsnotallocatedtoafunctionalpurposearenotphysicallypresentinthedevice.Thisarrangementprovidessimplesoftwareaccess.
interruptenable1and2
WDTIE:
Watchdogtimerinterruptenable.Inactiveifwatchdogmodeisselected.
Activeifwatchdogtimerisconfiguredasgeneral-purposetimer.
OFIE:
Oscillator-fault-interruptenable
NMIIE:
Nonmaskable-interruptenable
ACCVIE:
Flashmemoryaccessviolationinterruptenable
URXIE0:
USART0:
UARTandSPIreceive-interruptenable
UTXIE0:
USART0:
UARTandSPItransmit-interruptenable
URXIE1:
USART1:
UARTandSPIreceive-interruptenable
UTXIE1:
USART1:
UARTandSPItransmit-interruptenable
URXIE1andUTXIE1arenotpresentinMSP430x15xdevices.
interruptflagregister1and2
WDTIFG:
Setonwatchdog-timeroverflow(inwatchdogmode)orsecuritykeyviolation
ResetonVCCpower-on,oraresetconditionattheRST/NMIpininresetmode
OFIFG:
Flagsetonoscillatorfault
NMIIFG:
SetviaRST/NMIpin
URXIFG0:
USART0:
UARTandSPIreceiveflag
UTXIFG0:
USART0:
UARTandSPItransmitflag
URXIFG1:
USART1:
UARTandSPIreceiveflag
UTXIFG1:
USART1:
UARTandSPItransmitflag
moduleenableregisters1and2
URXE0:
USART0:
UARTmodereceiveenable
UTXE0:
USART0:
UARTmodetransmitenable
USPIE0:
USART0:
SPImodetransmitandreceiveenable
URXE1:
USART1:
UARTmodereceiveenable
UTXE1:
USART1:
UARTmodetransmitenable
USPIE1:
USART1:
SPImodetransmitandreceiveenable
URXE1,UTXE1,andUSPIE1arenotpresentinMSP430x15xdevices.
flashmemory
TheflashmemorycanbeprogrammedviatheJTAGport,thebootstraploader,orin-systembytheCPU.TheCPUcanperformsingle-byteandsingle-wordwritestotheflashmemory.Featuresoftheflashmemoryinclude:
_Flashmemoryhasnsegmentsofmainmemoryandtwosegmentsofinformationmemory(AandB)of128byteseach.Eachsegmentinmainmemoryis512bytesinsize.
_Segments0tonmaybeerasedinonestep,oreachsegmentmaybeindividuallyerased.
_SegmentsAandBcanbeerasedindividually,orasagroupwithsegments0−n.SegmentsAandBarealsocalledinformationmemory.
_Newdevicesmayhavesomebytesprogrammedintheinformationmemory(neededfortestduringmanufacturing).Theusershouldperformaneraseoftheinformationmemorypriortothefirstuse.
peripherals
PeripheralsareconnectedtotheCPUthroughdata,address,andcontrolbussesandcanbehandledusingallinstructions.Forcompletemoduledescriptions,seetheMSP430x1xxFamilyUser’sGuide,literaturenumberSLAU049.
DMAcontroller
TheDMAcontrollerallowsmovementofdatafromonememoryaddresstoanotherwithoutCPUintervention.
Forexample,theDMAcontrollercanbeusedtomovedatafromtheADC12conversionmemorytoRAM.UsingtheDMAcontrollercanincreasethethroughputofperipheralmodules.TheDMAcontrollerreducessystempowerconsumptionbyallowingtheCPUtoremaininsleepmodewithouthavingtoawakentomovedatatoorfromaperipheral.
oscillatorandsystemclock
TheclocksystemintheMSP430x15xandMSP430x16x(x)familyofdevicesissupportedbythebasicclockmodulethatincludessupportfora32768-Hzwatchcrystaloscillator,aninternaldigitally-controlledoscillator(DCO)andahighfrequencycrystaloscillator.Thebasicclockmoduleisdesignedtomeettherequirementsofbothlowsystemcostandlow-powerconsumption.TheinternalDCOprovidesafastturn-onclocksourceandstabilizesinlessthan6s.Thebasicclockmoduleprovidesthefollowingclocksignals:
_Auxiliaryclock(ACLK),sourcedfroma32768-Hzwatchcrystalorahighfrequencycrystal.
_Mainclock(MCLK),thesystemclockusedbytheCPU.
_Sub-Mainclock(SMCLK),thesub-systemclockusedbytheperipheralmodules.
brownout,supplyvoltagesupervisor
Thebrownoutcircuitisimplementedtoprovidetheproperinternalresetsignaltothedeviceduringpoweronandpoweroff.Thesupplyvoltagesupervisor(SVS)circuitrydetectsifthesupplyvoltagedropsbelowauserselectablelevelandsupportsbothsupplyvoltagesupervision(thedeviceisautomaticallyreset)andsupplyvoltagemonitoring(SVM,thedeviceisnotautomaticallyreset).TheCPUbeginscodeexecutionafterthebrownoutcircuitreleasesthedevicereset.However,VCCmaynothaverampedtoVCC(min)atthattime.TheusermustinsurethedefaultDCOsettingsarenot
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