20英文资料.docx
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20英文资料.docx
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20英文资料
英文资料
S3C2442B32-BITRISCAPPLICATIONPROCESSOR
USER’SMANUAL
INTRODUCTION
Thisuser’smanualdescribesSAMSUNG'sSC32442B16/32-bitRISCmicroprocessor.SAMSUNG’sSC32442Bisdesignedtoprovidehand-helddevicesandgeneralapplicationswithlow-power,andhigh-performancemicro-controllersolutioninsmalldiesize.Toreducetotalsystemcost,theSC32442Bincludesthefollowingcomponents.
TheSC32442BisdevelopedwithARM920Tcore,0.13umCMOSstandardcellsandamemorycomplier.Itslow-power,simple,elegantandfullystaticdesignisparticularlysuitableforcost-andpower-sensitiveapplications.ItadoptsanewbusarchitectureknownasAdvancedMicrocontrollerBusArchitecture(AMBA).
TheSC32442BoffersoutstandingfeatureswithitsCPUcore,a16/32-bitARM920TRISCprocessordesignedbyAdvancedRISCMachines,Ltd.TheARM920TimplementsMMU,AMBABUS,andHarvardcachearchitecturewithseparate16KBinstructionand16KBdatacaches,eachwithan8-wordlinelength.
Byprovidingacompletesetofcommonsystemperipherals,theSC32442Bminimizesoverallsystemcostsandeliminatestheneedtoconfigureadditionalcomponents.Theintegratedon-chipfunctionsthataredescribedinthisdocumentinclude:
◆Around400MHz@1.5Varmand1.5Vinternal,300MHz@1.35Varmand1.35Vinternal,1.8Vmemory,3.3VexternalI/Omicroprocessorwith16KBI-Cache/16KBD-Cache/MMU
◆Externalmemorycontroller(SDRAMControlandChipSelectlogic)
◆LCDcontroller(upto4KcolorSTNand256KcolorTFT)withLCD-dedicatedDMA
◆4-chDMAcontrollerswithexternalrequestpins
◆3-chUARTs(IrDA1.0,64-ByteTxFIFO,and64-ByteRxFIFO)
◆2-chSPls
◆IICbusinterface(multi-mastersupport)
◆IISAudioCODECinterface
◆SDHostinterfaceversion1.0&MMCProtocolversion2.11compatible
◆2-chUSBHostcontroller/1-chUSBDevicecontroller(ver1.1)
◆4-chPWMtimers/1-chInternaltimer/WatchDogTimer
◆8-ch10-bitADCandTouchscreeninterface
◆RTCwithcalendarfunction
◆Camerainterface(Max.4096x4096pixelsinputsupport.2048x2048pixelinputsupportforscaling)
◆130GeneralPurposeI/Oports/24-chexternalinterruptsource
◆Powercontrol:
Normal,Slow,Idle,stopandSleepmode
◆On-chipclockgeneratorwithPLL
FEATURES
◆Architecture
•Integratedsystemforhand-helddevicesandgeneralembeddedapplications.
•16/32-BitRISCarchitectureandpowerfulinstructionsetwithARM920TCPUcore.
•EnhancedARMarchitectureMMUtosupportWinCE,EPOC32andLinux.
•Instructioncache,datacache,writebufferandPhysicaladdressTAGRAMtoreducetheeffectofmainmemorybandwidthandlatencyonperformance.
•ARM920TCPUcoresupportstheARMdebugarchitecture.
•InternalAdvancedMicrocontrollerBusArchitecture(AMBA)(AMBA2.0,AHB/APB).
◆SystemManager
•Little/BigEndiansupport.
•SupportFastbusmodeandAsynchronousbusmode.
•Addressspace:
128Mbytesforeachbank(total1Gbytes).
•Supportsprogrammable8/16/32-bitdatabuswidthforeachbank.
•Fixedbankstartaddressfrombank0tobank6.
•Programmablebankstartaddressandbanksizeforbank7.
•Eightmemorybanks:
–SixmemorybanksforROM,SRAM,–TwomemorybanksforROM/SRAM/SynchronousDRAM.
•CompleteProgrammableaccesscyclesforallmemorybanks.
•Supportsexternalwaitsignalstoexpandthebuscycle.
•Supportsself-refreshmodeinSDRAMforpower-down.
•SupportsvarioustypesofROMforbooting(NOR/NANDFlash,EEPROM,andothers).
◆NANDFlashBootLoader
•SupportsbootingfromNANDflashmemory.
•4KBinternalbufferforbooting.
•SupportsstoragememoryforNANDflashmemoryafterbooting.
•SupportsAdvancedNANDflash
◆CacheMemory
•64-wayset-associativecachewithI-Cache(16KB)andD-Cache(16KB).
•8wordslengthperlinewithonevalidbitandtwodirtybitsperline.
•Pseudorandomorroundrobinreplacementalgorithm.
•Write-throughorwrite-backcacheoperationtoupdatethemainmemory.
•Thewritebuffercanhold16wordsofdataandfouraddresses.
◆Clock&PowerManager
•On-chipMPLLandUPLL:
UPLLgeneratestheclocktooperateUSBHost/Device.MPLLgeneratestheclocktooperateMCUatmaximum400MHz@1.5Varmand1.5Vinternal,300MHz@1.35Varmand1.35Vinternal,.
•Clockcanbefedselectivelytoeachfunctionblockbysoftware.
—Powermode:
Normal,Slow,Idle,Deep-stopandSleepmode
—Normalmode:
Normaloperatingmode
—Slowmode:
LowfrequencyclockwithoutPLL
—Idlemode:
TheclockforonlyCPUisstopped.
—Stopmode:
Allclocksarestopped.
—Deep-Stopmode:
Armpoweroffinternalclocksarestopped.
—Sleepmode:
TheCorepowerincludingallperipheralsisshutdown.
•WokenupbyEINT[15:
0]orRTCalarminterruptfromSleepmode
◆StackedMemory
•256Mbitor512MbitmSDRx32,VDD=1.8V
•512Mbitor1GbitNandFlash
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