基于51单片机的电子数字钟设计的外文翻译.docx
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基于51单片机的电子数字钟设计的外文翻译.docx
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基于51单片机的电子数字钟设计的外文翻译
基于51单片机的电子数字钟设计的外文翻译
AT89C51FamilyUser’sGuide
1.Features
•CompatiblewithMCS-51?
Products
•4KBytesofIn-SystemReprogrammableFlashMemory
–Endurance:
1,000Write/EraseCycles
•FullyStaticOperation:
0Hzto24MHz
•Three-levelProgramMemoryLock
•128x8-bitInternalRAM
•32ProgrammableI/OLines
•Two16-bitTimer/Counters
•SixInterruptSources
•ProgrammableSerialChannel
•Low-powerIdleandPower-downModes
2.Description
TheAT89C51isalow-power,high-performanceCMOS8-bitmicrocomputerwith4KbytesofFlashprogrammableanderasablereadonlymemory(PEROM).ThedeviceismanufacturedusingAtmel’shigh-densitynonvolatilememorytechnologyandis
compatiblewiththeindustry-standardMCS-51instructionsetandpin-out.Theon-chipFlashallowstheprogrammemorytobereprogrammedin-systemorbyaconventionalnonvolatilememoryprogrammer.Bycombiningaversatile8-bitCPUwithFlashonamonolithicchip,theAtmelAT89C51isapowerfulmicrocomputerwhichprovidesahighly-flexibleandcost-effectivesolutiontomanyembeddedcontrolapplications.
3.PinConfigurations
4.LockDiagram
TheAT89C51providesthefollowingstandardfeatures:
4KbytesofFlash,128bytesofRAM,32I/Olines,two16-bittimer/counters,afivevectortwo-levelinterruptarchitecture,afullduplexserialport,on-chiposcillatorandclockcircuitry.Inaddition,theAT89C51isdesignedwithstaticlogicforoperationdowntozerofrequencyandsupportstwosoftwareselectablepowersavingmodes.TheIdleModestopstheCPUwhileallowingtheRAM,timer/counters,serialportandinterruptsystemtocontinuefunctioning.The
Power-downModesavestheRAMcontentsbutfreezestheoscillatordisablingallotherchipfunctionsuntilthenexthardwarereset.
5.PinDescription
VCC:
Supplyvoltage.
GND:
Ground.
Port0:
Port0isan8-bitopen-drainbi-directionalI/Oport.Asanoutputport,eachpincansinkeightTTLinputs.When1sarewrittentoport0pins,thepinscanbeusedashigh-impedanceinputs.
Port0mayalsobeconfiguredtobethemultiplexedlow-orderaddress/databusduringaccessestoexternalprogramanddatamemory.InthismodeP0hasinternalpull-ups.
Port0alsoreceivesthecodebytesduringFlashprogramming,andoutputsthecodebytesduringprogramverification.Externalpull-upsarerequiredduringprogramverification.
Port1:
Port1isan8-bitbi-directionalI/Oportwithinternalpull-ups.ThePort1outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort1pinstheyarepulledhighbytheinternalpull-upsandcanbeusedasinputs.Asinputs,Port1pinsthatareexternallybeingpulledlowwillsourcecurrent(IIL)becauseoftheinternalpull-ups.Port1alsoreceivesthelow-orderaddressbytesduringFlashprogrammingandverification.Port2:
Port2isan8-bitbi-directionalI/Oportwithinternalpull-ups.ThePort2outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort2pinstheyarepulledhighbytheinternalpull-upsandcanbeusedasinputs.Asinputs,Port2pinsthatareexternallybeingpulledlowwillsourcecurrent(IIL)becauseoftheinternalpull-ups.Port2emitsthehigh-orderaddressbyteduringfetchesfromexternalprogrammemoryandduringaccessestoexternaldatamemorythatuses16-bitaddresses(MOVX@DPTR).In
thisapplication,itusesstronginternalpull-upswhenemitting1s.Duringaccessestoexternaldatamemorythatuses8-bitaddresses(MOVX@RI),Port2emitsthecontentsoftheP2SpecialFunctionRegister.Port2alsoreceivesthehigh-orderaddressbitsandsomecontrolsignalsduringFlashprogrammingandverification.
Port3:
Port3isan8-bitbi-directionalI/Oportwithinternalpull-ups.ThePort3outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort3pinstheyarepulledhighbytheinternalpull-upsandcanbeusedasinputs.Asinputs,Port3pinsthatareexternallybeingpulledlowwillsourcecurrent(IIL)becauseofthepull-ups.Port3alsoservesthefunctionsofvariousspecialfeaturesoftheAT89C51aslistedbelow:
PortPinAlternateFunctions
P3.0RXD(serialinputport)
P3.1TXD(serialoutputport)
P3.2INT0(externalinterrupt0)
P3.3INT1(externalinterrupt1)
P3.4T0(timer0externalinput)
P3.5T1(timer1externalinput)
P3.6WR(externaldatamemorywritestrobe)
P3.7RD(externaldatamemoryreadstrobe)
Port3alsoreceivessomecontrolsignalsforFlashprogrammingandverification.RST:
Resetinput.Ahighonthispinfortwomachinecycleswhiletheoscillatoris
runningresetsthedevice.
______________
ALE/PROG:
AddressLatchEnableoutputpulseforlatchingthelowbyteoftheaddressduringaccessestoexternalmemory.Thispinisalsotheprogrampulseinput(PROG)duringFlashprogramming.InnormaloperationALEisemittedataconstantrateof1/6theoscillatorfrequency,andmaybeusedforexternaltimingorclockingpurposes.Note,however,thatoneALEpulseisskippedduringeachaccesstoexternalDataMemory.Ifdesired,ALEoperationcanbedisabledbysettingbit0ofSFRlocation8EH.Withthebitset,ALEisactiveonlyduringaMOVXorMOVCinstruction.Otherwise,thepinis
weaklypulledhigh.SettingtheALE-disablebithasnoeffectifthemicrocontrollerisinexternalexecutionmode.
___________PSEN:
ProgramStoreEnableisthereadstrobetoexternalprogrammemory.Whenthe
____________
AT89C51isexecutingcodefromexternalprogrammemory,PSENisactivatedtwice
____________
eachmachinecycle,exceptthattwoPSENactivationsareskippedduringeachaccessto
externaldatamemory.
_______EA/VPP:
_______
ExternalAccessEnable.EAmustbestrappedtoGNDinordertoenablethedevicetofetchcodefromexternalprogrammemorylocationsstartingat0000HuptoFFFFH.
_______
Note,however,thatiflockbit1isprogrammed,EAwillbeinternallylatchedonreset.
________
EAshouldbestrappedtoVforinternalprogramexecutions.ThispinalsoreceivestheCC
12-voltprogrammingenablevoltage(V)duringFlashprogramming,forpartsthatPP
require12-voltV.PP
XTAL1:
Inputtotheinvertingoscillatoramplifierandinputtotheinternalclockoperatingcircuit.
XTAL2:
Outputfromtheinvertingoscillatoramplifier.
6.OscillatorCharacteristics
XTAL1andXTAL2aretheinputandoutput,respectively,ofaninvertingamplifierwhichcanbeconfiguredforuseasanon-chiposcillator,asshowninFigure1.Eitheraquartzcrystalorceramicresonatormaybeused.Todrivethedevicefromanexternalclocksource,XTAL2shouldbeleftunconnectedwhileXTAL1isdrivenasshowninFigure2.Therearenorequirementsonthedutycycleoftheexternalclocksignal,sincetheinputtotheinternalclockingcircuitryisthroughadivide-by-twoflip-flop,butminimumandmaximumvoltagehighandlowtimespecificationsmustbeobserved.
OscillatorConnections
Note:
C1,C2=30pF?
10pFforCrystals
=40pF?
10pFforCeramicResonators
ExternalClockDriveConfiguration
7.IdleMode
Inidlemode,theCPUputsitselftosleepwhilealltheon-chipperipheralsremainactive.Themodeisinvokedbysoftware.Thecontentoftheon-chipRAMandallthe
specialfunctionsregistersremainunchangedduringthismode.Theidlemodecanbeterminatedbyanyenabledinterruptorbyahardwarereset.Itshouldbenotedthatwhenidleisterminatedbyahardwarereset,thedevicenormallyresumesprogramexecution,fromwhereitleftoff,uptotwomachinecyclesbeforetheinternalresetalgorithmtakescontrol.On-chiphardwareinhibitsaccesstointernalRAMinthisevent,butaccesstotheportpinsisnotinhibited.ToeliminatethepossibilityofanunexpectedwritetoaportpinwhenIdleisterminatedbyreset,theinstructionfollowingtheonethatinvokesIdleshouldnotbeonethatwritestoaportpinortoexternalmemory.
8.Power-downMode
Inthepower-downmode,theoscillatorisstopped,andtheinstructionthatinvokespower-downisthelastinstructionexecuted.Theon-chipRAMandSpecialFunctionRegistersretaintheirvaluesuntilthepower-downmodeisterminated.Theonlyexitfrompower-downisahardwarereset.ResetredefinestheSFRsbutdoesnotchangetheon-chipRAM.TheresetshouldnotbeactivatedbeforeVCCisrestoredtoitsnormaloperatinglevelandmustbeheldactivelongenoughtoallowtheoscillatortorestartandstabilize.9.ProgrammingtheFlash
TheAT89C51isnormallyshippedwiththeon-chipFlashmemoryarrayintheerasedstate(thatis,contents=FFH)andreadytobeprogrammed.Theprogramminginterfaceacceptseitherahigh-voltage(12-volt)oralow-voltage(VCC)programenablesignal.Thelow-voltageprogrammingmodeprovidesaconvenientwaytoprogramtheAT89C51insidetheuser’ssystem,whilethehigh-voltageprogrammingmodeiscompatiblewith
conventionalthirdpartyFlashorEPROMprogrammers.TheAT89C51isshippedwitheitherthehigh-voltageorlow-voltageprogrammingmodeenabled.Therespectivetop-sidemarkinganddevicesignaturecodesarelistedinthefollowingtable.
TheAT89C51codememoryarrayisprogrammedbyte-by-byteineitherprogrammingmode.Toprogramanynonblankbyteintheon-chipFlashMemory,theentirememorymustbeerasedusingtheChipEraseMode.
10.FlashProgrammingandVerificationCharacteristics
TA=0?
Cto70?
C,VCC=5.0?
10%
Note:
1.Onlyusedin12-voltprogrammingmode.
11.DCCharacteristics
TA=-40?
Cto85?
C,VCC=5.0V?
20%(unlessotherwisenoted)
Notes:
1.understeadystate(non-transient)conditions,IOLmustbeexternallylimitedasfollows:
MaximumIOLperportpin:
10mA
MaximumIOLper8-bitport:
Por
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