虚拟存储器基础.docx
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虚拟存储器基础.docx
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虚拟存储器基础
6.823ComputerSystemArchitecture
ProblemSet#3Spring2002
Studentsarestronglyencouragedtocollaborateingroupsofuptothreepeople.Agroupshouldhandinonlycopyofthesolutiontotheproblemset.Problemsetsaredueinthebeginningofclassontheduedate.Tofacilitategrading,thesolutiontoeachproblemmustbestapledseparately.Problemsetswillnotbeacceptedoncesolutionshavebeenhandedout.
Problem1:
OptimizingforCachePerformance
Inthisproblem,youwillexploreseveralcommoncompileroptimizationsforimprovingcacheperformance.
Problem1.ALoopOrdering
Considera1KBdirect-mappedcachewhereeachcachelinecontainsfourwords.Youareaskedtoconsiderthefollowingtwoloops,writteninC,whichcalculatethesumoftheentriesina64by16matrixof32-bitintegers:
ThematrixAisstoredcontiguouslyinmemory,inrow-majororder1,andisalignedtocache-lineboundaries.Youmayassumethatanyothervariablesusedareallocatedtoregisters,andthattheonlycacheactivityinvolvestheelementsofthematrix.
CalculatethenumberofcachemissesthatoccurwhenrunningloopAandwhenrunningloopB.Arethetwovaluesthesame?
Explainwhyorwhynot.
Problem1.BBlocking
BlockingwasdiscussedinlectureBasawaytooptimizecacheperformanceforcomputationsonlargematricesthatdonotfitinthecache.HereisasimpleimplementationofmatrixmultiplyforanNbyNmatrixthatdoesnotblocking:
whererisaregister.
Hereisanimplementationthatusesblocking,which5x5blocks:
Toseehowblockingworks,wewillsimulatethecachebehaviorforN=4andS=2forafully-associativewrite-allocatecachewithtwo-wordcachelinesusinganLRUreplacementpolicy.Assumethatthematricesarealignedtocachelineboundariesandthatthecomputerdidnotre-orderantloadsorstores.CompleteTable1-1andTable1-2forthetwoimplementationsofmatrixmultiply,showingtheprogressingofcachecontentsasaccessesoccur.Onlyfillinelementsinthetablewhenavaluechanges,orwhenacachehitoccurs,inwhichcaseput“HIT”inthecorrespondingentry.
Calculatethemissrateforthetwoimplementationsbasedontheentriesinthetables.
Problem1.CMoreBlocking
BenBitdiddleisimplementingthematrix-multiply-with-blockingalgorithmfrompartB,
Hehypothesizesthatheshouldveavletogetreasonableperformanceifhecangetthetwoinner-mostloopsofthealgorithmtorunwithoutanycachemissesotherthancompulsorymisses.
Ben’simplementationrunsontheUltraS{ARC-I,whichhasadirect-mapped,write-throughnon-allocatingcache.Ignoringconflictmissesforthemoment,howbigdoesthedatacachehavetobeifBenweretouseablockingfactorofs?
Assumethattheonlycacheactivityinvolvestheelementsofthematrices(i.e.thatanyothervariablesusedareallocatedtoregisters).
Usingyourresult,calculatethemaximumvalueofBthatBencouldchooseforhisimplementation.TheUltraSPARC-Ihasa16KBdatacache.
Ben’scodeoperateson3000by3000matricesof32-bitintegervalues,laidoutinmemoryinrow-majororder.Herunssomesimulationsandfindsthatforhisparticulardataplacementandcacheconfiguration,therearesomeconflictmisses,butnotsomanythatitisaseriousconcern.However,whenheteststhecodeontheIltraSPARC-Iusingthemaximumblocksizethatyoudetermine,theperformanceisdismal.AlyssasuggeststhattheproblemmayberelatedtotheTLB.
PleaseexplainhowtheTLBcanbecausingthisproblem.TheTLbontheIltraSPARC-Iisfully-associstiveandcontains64entries.Pagesare8KB.TLBmissesarehandledinsoftware.YoumayassumethatanLRUreplacementpolicyisused.Thedatacacheisvirtually-taggedandvirtually-indexed.
Problem1.DThinkDifferent
WhenAppleComputerfirststartedusingthePowerPCprocessorintheirmachines,theyheldacompany-widecontestonwhocouldwritethefasterBlockMoveroutine,alibraryroutinewhichcopiessomenumberofbytesfromonememorylocationtoanother.
Thetoptwocontestantswereamicrocoderandacomputerarchitect.TheirimplementationsofBlockMovewerebefarthefastestinthecompany.BenBitdiddlewasinterningatAppleandcaughtaglimpseoftheircode,andnoticedthatbothroutinesusethedobzPowerPCassemblyinstruction,whichexecutesinonecycle,andhasthefollowingsemantics:
Iftheblockcontainingthebyteaddressableby(rA)+(rB)isinthedatacache,allbytesoftheblockareclearedtozero.
Iftheblockcontainingthebyteaddressedby(rA)+(rB)isnotinthedatacache,theblockisallocatedinthedatacachewithoutfetchingtheblockfrommainmemory,andallvytesoftheblockaresettozero.
Benknowsthatallthe6.823studentshavecompletedproblemset2andarenowexperiencedmicrocodersandarchitects.HewantstoclimbtheranksatA
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