USB接口外文文献.docx
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USB接口外文文献.docx
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USB接口外文文献
外文文献原文
ISP1581Hi-SpeedUniversalSerialBusinterfacedevice
1Generaldescription
TheISP1581isacost-optimizedandfeature-optimizedHi-SpeedUniversalSerialBus(USB)interfacedevice,whichfullycomplieswiththeUniversalSerialBusSpecificationRev.2.0.Itprovideshigh-speedUSBcommunicationcapacitytosystemsbasedonamicrocontrolleroramicroprocessor.TheISP1581communicateswiththesystem’smicrocontroller/processorthroughahigh-speedgeneral-purposeparallelinterface.
TheISP1581supportsautomaticdetectionofHi-SpeedUSBsystemoperation.TheOriginalUSBfall-backmodeallowsthedevicetoremainoperationalunderfull-speedconditions.ItisdesignedasagenericUSBinterfacedevicesothatitcanfitintoallexistingdeviceclasses,suchas:
ImagingClass,MassStorageDevices,CommunicationDevices,PrintingDevicesandHumanInterfaceDevices.
TheinternalgenericDMAblockallowseasyintegrationintodatastreamingapplications.Inaddition,thevariousconfigurationsoftheDMAblockaretailoredformassstorageapplications.
ThemodularapproachtoimplementingaUSBinterfacedeviceallowsthedesignertoselecttheoptimumsystemmicrocontrollerfromthewidevarietyavailable.Theabilitytore-useexistingarchitectureandfirmwareinvestmentsshortensthedevelopmenttime,eliminatesriskandreducescosts.Theresultisfastandefficientdevelopmentofthemostcost-effectiveUSBperipheralsolution.
TheISP1581isideallysuitedformanytypesofperipherals,suchas:
printers;scanners;magneto-optical(MO),compactdisc(CD),digitalvideodisc(DVD)andZip®/Jaz®drives;digitalstillcameras;USB-to-Ethernetlinks;cableandDSLmodems.Thelowpowerconsumptionduring‘suspend’modeallowseasydesignofequipmentthatiscomplianttotheACPI™,OnNow™andUSBpowermanagementrequirements.
TheISP1581alsoincorporatesfeaturessuchasSoftConnect™,areducedfrequencycrystaloscillatorandintegratedterminationresistors.ThesefeaturesallowsignificantcostsavingsinsystemdesignandeasyimplementationofadvancedUSBfunctionalityintoPCperipherals.
2Features
·DirectinterfacetoATA/ATAPIperipherals
·
·ComplieswithmostDeviceClassspecifications
·HighperformanceUSBinterfacedevicewithintegratedSerialInterfaceEngine
(SIE),PIE,FIFOmemory,datatransceiverand3.3Vvoltageregulators
·SupportsautomaticHi-SpeedUSBmodedetectionandOriginalUSBfall-back
mode
·High-speedDMAinterface(12.8Mword/s)
·Fullyautonomousandmulti-configurationDMAoperation
·7INendpoints,7OUTendpointsandafixedcontrolIN/OUTendpoint
·Integratedphysical8kbyteofmulti-configurationFIFOmemory
·Endpointswithdoublebufferingtoincreasethroughputandeasereal-timedata
transfer
·Busindependentinterfacewithmostmicrocontroller/microprocessors
(12.5Mbyte/s)
·12MHzcrystaloscillatorwithintegratedPLLforlowEMI
·Integrated5V-to-3Vbuilt-involtageregulator
·SoftwarecontrolledconnectiontotheUSBbus(SoftConnect™)
·ComplieswiththeACPI™,OnNow™andUSBpowermanagementrequirements
·Internalpower-onandlow-voltageresetcircuit,alsosupportingasoftwarereset
·OperationovertheextendedUSBbusvoltagerange(4.0to5.5V)with5V
tolerantI/Opads
·Operatingtemperaturerange-40to+85°C
·AvailableinLQFP64package.
3Applications
·PersonalDigitalAssistant(PDA)
·Massstoragedevice,e.g.Zip®,Jaz®,MO,CD,DVDdrive
·DigitalVideoCamera
·DigitalStillCamera
·3Gmobilephone
·MP3player
·Communicationdevice,e.g.router,modem
·Printer
·Scanner.
4Functionaldescription
TheISP1581isahigh-speedUSBdevicecontroller.ItimplementstheHi-SpeedUSBandOriginalUSBphysicallayer,thepacketprotocollayerandmaintainsupto16USBendpointsconcurrently(controlINandcontrolOUT,7INand7OUTconfigurable)alongwithEndpointEP0SETUP,whichisusedtoaccessthesetupbuffer.USBChapter9protocolhandlingisexecutedbymeansofexternalfirmware.
TheISP1581hasafastgeneral-purposeinterfaceforcommunicationwithmosttypesofmicrocontrollers/processors.ThisMicrocontrollerInterfaceisconfiguredbypinsBUS_CONF,MODE1andMODE0toaccommodatemostinterfacetypes.Twobusconfigurationsareavailable,selectedviainputBUS_CONFduringpower-up:
•GenericProcessormode(BUS_CONF=1):
–AD[7:
0]:
8-bitaddressbus(selectstargetregister)
–DATA[15:
0]:
16-bitdatabus(sharedbyprocessorandDMA)
–Controlsignals:
R/WandDSorRDandWR(selectedviapinMODE0),CS
–DMAinterface(genericslavemodeonly):
useslinesDATA[15:
0]asdatabus,
DIORandDIOWasdedicatedreadandwritestrobes.
•SplitBusmode(BUS_CONF=0):
–AD[7:
0]:
8-bitlocalmicroprocessorbus(multiplexedaddress/data)
–DATA[15:
0]:
16-bitDMAdatabus
–Controlsignals:
CS,ALEorA0(selectedviapinMODE1),R/WandDSorRD
andWR(selectedviapinMODE0)
–DMAinterface(masterorslavemode):
usesDIORandDIOWasdedicatedread
andwritestrobes.
Forhigh-bandwidthdatatransfer,theintegratedDMAhandlercanbeinvokedto
transferdatato/fromexternalmemoryordevices.TheDMAInterfacecanbeconfiguredbywritingtotheproperDMAregisters.
TheISP1581supportsHi-SpeedUSBandOriginalUSBsignaling.Detectionofthe
USBsignalingspeedisdoneautomatically.
ISP1581has8kbytesofinternalFIFOmemory,whichissharedamongtheenabled
USBendpoints.
Thereare7INendpoints,7OUTendpointsand2controlendpointsthatareafixed64byteslong.Anyofthe7INand7OUTendpointscanbeseparatelyenabledordisabled.Theendpointtype(interrupt,isochronousorbulk)andpacketsizeoftheseendpointscanbeindividuallyconfigureddependingontherequirementsoftheapplication.Optionaldoublebufferingincreasesthedatathroughputofthesedataendpoints.
TheISP1581requiresasinglesupplyof3.3Vor5.0V,dependingontheI/Ovoltage.
Ithas5.0VtolerantI/Opadsandhasaninternal3.3Vregulatorforpoweringtheanalogtransceiver.
TheISP1581operatesona12MHzcrystaloscillator.Anintegrated40´PLLclockmultipliergeneratestheinternalsamplingclockof480MHz.
4.1Hi-SpeedUSBtransceiver
TheanalogtransceiverinterfacesdirectlytotheUSBcableviaintegratedterminationresistors.Thehigh-speedtransceiverrequiresanexternalresistor(12.0kW±1%)betweenpinRREFandgroundtoensureanaccuratecurrentmirrorthatisusedtogeneratetheHi-SpeedUSBcurrentdrive.Afull-speedtransceiverisintegratedaswell.ThismakestheISP1581compliantwithHi-SpeedUSBandOriginalUSB,supportingboththehigh-speedandfull-speedphysicallayer.Afterautomaticspeeddetection,thePhilipsSerialInterfaceEnginesetsthetransceivertouseeitherhigh-speedorfull-speedsignaling.
4.2PhilipsSerialInterfaceEngine(SIE)
ThePhilipsSIEimplementsthefullUSBprotocollayer.Itiscompletelyhardwiredforspeedandneedsnofirmwareintervention.Thefunctionsofthisblockinclude:
Synchronizationpatternrecognition,parallel/serialconversion,bit(de-)stuffing,CRCchecking/generation,PacketIdentifier(PID)verification/generation,addressrecognition,handshakeevaluation/generation.
4.3PhilipsHS(High-Speed)Transceiver
4.3.1PhilipsParallelInterfaceEngine
IntheHSTransceiver,thePhilipsPIEinterfaceusesa16bitParallelbi-directional
datainterface.ThefunctionsoftheHS(High-speed)modulealsoincludeBit-stuffing/De-stuffingandNRZIEncoding/Decodinglogic.
4.3.2Peripheralcircuit
TomaintainaconstantcurrentdriverforHS(High-Speed)transmitcircuitsandtobiasotheranalogcircuits,aninternalband-gapreferencecircuitandRREFresistorareusedtoformthereferencecurrent.Thiscircuitrequiresanexternalprecisionresistor(12.0kW±1%)connectedtoanalogground.
HSdetection
ISP1581handlesmorethanoneelectricalstate(FS/HS)undertheUSBspecification.WhentheUSBcableisconnectedfromthedevicetothehostcontroller,atfirstthedeviceISP1581defaultstotheFull-speed(FS)stateuntilitseesabusresetfromthehostcontroller.
Duringthebusreset,thedeviceinitiatesaHSchirptodetectwhetherthehost-controllersupportsHi-SpeedUSBorOriginalUSB.Chirpingmustbedonewiththepull-upresistorconnectedandtheinternalterminationresistorsdisabled.IftheHShandshakeshowsthatthereisaHShostconnected,thenISP1581switchestotheHSstate.
InHSstate,theISP1581observesthebusforperiodicactivity.Ifthebusremainsinactivefor3ms,thedeviceswitchestotheFSstatetocheckforanSE0(Single-endedzero)conditionontheUSBbus.IfanSE0conditionisdetectedforthedesignatedtimewindow(100msto875ms,seeSection.6oftheUSBspecificationRev.2.0),theISP1581switchestotheHSchirpstateagaintodoaHSdetectionhandshake.Otherwise,theISP1581remainsintheFSstateadheringtothebus-suspendspecification.
4.4Voltageregulators
Two5V-to-3.3Vvoltageregulatorsareintegratedon-chiptoseparatelysupplythe
analogtransceiverandtheinternallogic.TheoutputofthesevoltageregulatorsaretermedasVCCA(3.3)andVCC(3.3)todistinguishthemasbeingusedfortheanalogblockandthedigitalblock,respectively.ThepinVCCA(3.3)isalsousedtosupplyanexternal1.5kWpull-upresistorontheD+line.
Remark:
PinsVCCA(3.3)andVCC(3.3)cannotbeusedtosupplyexternaldevices.
4.5MemoryManagementUnit(MMU)andintegratedRAM
TheMMUandtheintegratedRAMprovidetheconversionbetweentheUSBspeed
(full-speed:
12Mbit/s,high-speed:
480Mbit/s)andtheMicrocontrollerHandlerortheDMAHandler.ThedatafromtheUSBBusisstoredintheintegratedRAM,whichisclearedonlywhenthemicrocontroll
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