基于51单片机的电子数字钟设计的外文翻译.docx
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基于51单片机的电子数字钟设计的外文翻译.docx
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基于51单片机的电子数字钟设计的外文翻译
基于51单片机的电子数字钟设计的外文翻译
AT89C51FamilyUsersGuide
1Features
CompatiblewithMCS-51Products
4KBytesofIn-SystemReprogrammableFlashMemory
–Endurance1000WriteEraseCycles
FullyStaticOperation0Hzto24MHz
Three-levelProgramMemoryLock
128x8-bitInternalRAM
32ProgrammableIOLines
Two16-bitTimerCounters
SixInterruptSources
ProgrammableSerialChannel
Low-powerIdleandPower-downModes
2Description
TheAT89C51isalow-powerhigh-performanceCMOS8-bitmicrocomputerwith4KbytesofFlashprogrammableanderasablereadonlymemoryPEROMThedeviceismanufacturedusingAtmelshigh-densitynonvolatilememorytechnologyandiscompatiblewiththeindustry-standardMCS-51instructionsetandpin-outTheon-chipFlashallowstheprogrammemorytobereprogrammedin-systemorbyaconventionalnonvolatilememoryprogrammerBycombiningaversatile8-bitCPUwithFlashonamonolithicchiptheAtmelAT89C51isapowerfulmicrocomputerwhichprovidesahighly-flexibleandcost-effectivesolutiontomanyembeddedcontrolapplications
3PinConfigurations
4LockDiagram
TheAT89C51providesthefollowingstandardfeatures4KbytesofFlash128bytesofRAM32IOlinestwo16-bittimercountersafivevectortwo-levelinterruptarchitectureafullduplexserialporton-chiposcillatorandclockcircuitryInadditiontheAT89C51isdesignedwithstaticlogicforoperationdowntozerofrequencyandsupportstwosoftwareselectablepowersavingmodesTheIdleModestopstheCPUwhileallowingtheRAMtimercountersserialportandinterruptsystemtocontinuefunctioningThePower-downModesavestheRAMcontentsbutfreezestheoscillatordisablingallotherchipfunctionsuntilthenexthardwarereset
5PinDescription
VCCSupplyvoltage
GNDGround
Port0
Port0isan8-bitopen-drainbi-directionalIOportAsanoutputporteachpincansinkeightTTLinputsWhen1sarewrittentoport0pinsthepinscanbeusedashigh-impedanceinputs
Port0mayalsobeconfiguredtobethemultiplexedlow-orderaddressdatabusduringaccessestoexternalprogramanddatamemoryInthismodeP0hasinternalpull-ups
Port0alsoreceivesthecodebytesduringFlashprogrammingandoutputsthecodebytesduringprogramverificationExternalpull-upsarerequiredduringprogramverification
Port1
Port1isan8-bitbi-directionalIOportwithinternalpull-upsThePort1outputbufferscansinksourcefourTTLinputsWhen1sarewrittentoPort1pinstheyarepulledhighbytheinternalpull-upsandcanbeusedasinputsAsinputsPort1pinsthatareexternallybeingpulledlowwillsourcecurrentIILbecauseoftheinternalpull-upsPort1alsoreceivesthelow-orderaddressbytesduringFlashprogrammingandverification
Port2
Port2isan8-bitbi-directionalIOportwithinternalpull-upsThePort2outputbufferscansinksourcefourTTLinputsWhen1sarewrittentoPort2pinstheyarepulledhighbytheinternalpull-upsandcanbeusedasinputsAsinputsPort2pinsthatareexternallybeingpulledlowwillsourcecurrentIILbecauseoftheinternalpull-upsPort2emitsthehigh-orderaddressbyteduringfetchesfromexternalprogrammemoryandduringaccessestoexternaldatamemorythatuses16-bitaddressesMOVXDPTRInthisapplicationitusesstronginternalpull-upswhenemitting1sDuringaccessestoexternaldatamemorythatuses8-bitaddressesMOVXRIPort2emitsthecontentsoftheP2SpecialFunctionRegisterPort2alsoreceivesthehigh-orderaddressbitsandsomecontrolsignalsduringFlashprogrammingandverification
Port3
Port3isan8-bitbi-directionalIOportwithinternalpull-upsThePort3outputbufferscansinksourcefourTTLinputsWhen1sarewrittentoPort3pinstheyarepulledhighbytheinternalpull-upsandcanbeusedasinputsAsinputsPort3pinsthatareexternallybeingpulledlowwillsourcecurrentIILbecauseofthepull-upsPort3alsoservesthefunctionsofvariousspecialfeaturesoftheAT89C51aslistedbelow
PortPinAlternateFunctionsP30RXDserialinputportP31TXDserialoutputportP32INT0externalinterrupt0P33INT1externalinterrupt1P34T0timer0externalinputP35T1timer1externalinputP36WRexternaldatamemorywritestrobeP37RDexternaldatamemoryreadstrobePort3alsoreceivessomecontrolsignalsforFlashprogrammingandverification
RST
ResetinputAhighonthispinfortwomachinecycleswhiletheoscillatorisrunningresetsthedevice
ALE
AddressLatchEnableoutputpulseforlatchingthelowbyteoftheaddressduringaccessestoexternalmemoryThispinisalsotheprogrampulseinputPROGduringFlashprogrammingInnormaloperationALEisemittedataconstantrateof16theoscillatorfrequencyandmaybeusedforexternaltimingorclockingpurposesNotehoweverthatoneALEpulseisskippedduringeachaccesstoexternalDataMemoryIfdesiredALEoperationcanbedisabledbysettingbit0ofSFRlocation8EHWiththebitsetALEisactiveonlyduringaMOVXorMOVCinstructionOtherwisethepinisweaklypulledhighSettingtheALE-disablebithasnoeffectifthemicrocontrollerisinexternalexecutionmode
ProgramStoreEnableisthereadstrobetoexternalprogrammemoryWhentheAT89C51isexecutingcodefromexternalprogrammemoryisactivatedtwiceeachmachinecycleexceptthattwoactivationsareskippedduringeachaccesstoexternaldatamemory
VPP
ExternalAccessEnablemustbestrappedtoGNDinordertoenablethedevicetofetchcodefromexternalprogrammemorylocationsstartingat0000HuptoFFFFHNotehoweverthatiflockbit1isprogrammedwillbeinternallylatchedonresetshouldbestrappedtoVCCforinternalprogramexecutionsThispinalsoreceivesthe12-voltprogrammingenablevoltageVPPduringFlashprogrammingforpartsthatrequire12-voltVPP
XTAL1
Inputtotheinvertingoscillatoramplifierandinputtotheinternalclockoperatingcircuit
XTAL2
Outputfromtheinvertingoscillatoramplifier
6OscillatorCharacteristics
XTAL1andXTAL2aretheinputandoutputrespectivelyofaninvertingamplifierwhichcanbeconfiguredforuseasanon-chiposcillatorasshowninFigure1EitheraquartzcrystalorceramicresonatormaybeusedTodrivethedevicefromanexternalclocksourceXTAL2shouldbeleftunconnectedwhileXTAL1isdrivenasshowninFigure2Therearenorequirementsonthedutycycleoftheexternalclocksignalsincetheinputtotheinternalclockingcircuitryisthroughadivide-by-twoflip-flopbutminimumandimumvoltagehighandlowtimespecificationsmustbeobserved
OscillatorConnections
NoteC1C230pF±10pFforCrystals
40pF±10pFforCeramicResonators
ExternalClockDriveConfiguration
7IdleMode
InidlemodetheCPUputsitselftosleepwhilealltheon-chipperipheralsremainactiveThemodeisinvokedbysoftwareThecontentoftheon-chipRAMandallthespecialfunctionsregistersremainunchangedduringthismodeTheidlemodecanbeterminatedbyanyenabledinterruptorbyahardwareresetItshouldbenotedthatwhenidleisterminatedbyahardwareresetthedevicenormallyresumesprogramexecutionfromwhereitleftoffuptotwomachinecyclesbeforetheinternalresetalgorithmtakescontrolOn-chiphardwareinhibitsaccesstointernalRAMinthiseventbutaccesstotheportpinsisnotinhibitedToeliminatethepossibilityofanunexpectedwritetoaportpinwhenIdleisterminatedbyresettheinstructionfollowingtheonethatinvokesIdleshouldnotbeonethatwritestoaportpinortoexternalmemory
8Power-downMode
Inthepower-downmodetheoscillatorisstoppedandtheinstructionthatinvokespower-downisthelastinstructionexecutedTheon-chipRAMandSpecialFunctionRegistersretaintheirvaluesuntilthepower-downmodeisterminatedTheonlyexitfrompower-downisahardwareresetResetredefinestheSFRsbutdoesnotchangetheon-chipRAMTheresetshouldnotbeactivatedbeforeVCCisrestoredtoitsnormaloperatinglevelandmustbeheldactivelongenoughtoallowtheoscillatortorestartandstabilize
9ProgrammingtheFlash
TheAT89C51isnormallyshippedwiththeon-chipFlashmemoryarrayintheerasedstatethatiscontentsFFHandreadytobeprogrammedTheprogramminginterfaceacceptseitherahigh-voltage12-voltoralow-voltageVCCprogramenablesignalThelow-voltageprogrammingmodeprovidesaconvenientwaytoprogramtheAT89C51insidetheuserssystemwhilethehigh-voltageprogrammingmodeiscompatiblewithconventionalthirdpartyFlashorEPROMprogrammersTheAT89C51isshippedwitheitherthehigh-voltageorlow-voltageprogrammingmodeenabledTherespectivetop-sidemarkinganddevicesignaturecodesarelistedinthefollowingtable
TheAT89C51codememoryarrayisprogrammedbyte-by-byteineitherprogrammingmodeToprogramanynonblankbyteintheon-chipFlashMemorytheentirememorymustbeerasedusingtheChipEraseMode
10FlashProgrammingandVerificationCharacteristics
TA0°Cto70°CVCC50±10
Note1Onlyusedin12-voltprogrammingmode
11DCCharacteristics
TA-40°Cto85°CVCC50V±20unlessotherwisenoted
Notes
1understeadystatenon-transientconditionsIOLmustbeexternallylimitedasfollows
imumIOLperportpin10mA
imumIOLper8-bitportPort026mA
Ports12315mA
imumtotalIOLforalloutputpins71mA
IfIOLexceedsthetestconditionVOLmayexceedtherelatedspecificationPinsarenotguaranteedtosinkcurrentgreaterthanthelistedtestconditions
2MinimumVCCforPower-downis2V
12ExternalProgramandDataMemoryCharacteristics
13ExternalProgramMemoryReadCycle
14ExternalDataMemoryReadCycle
15ExternalDataMemoryWriteCycle
16ExternalClockDriveWaveforms
17ExternalClockDrive
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