CPLD课程设计代码.docx
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CPLD课程设计代码.docx
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CPLD课程设计代码
附:
程序代码
注:
译码器,分频,点阵,流水灯,步进电机五部分为源代码的功能拓展,带下划线部分为修改或添加的代码。
交通灯,多路选择器为编写设计代码。
1、译码器:
LIBRARYieee;
USEieee.std_logic_1164.ALL;
ENTITYdecoder3_8IS
PORT(
A,B,C:
INSTD_LOGIC;
Y:
OUTSTD_LOGIC_VECTOR(7DOWNTO0);--段选输出
en:
OUTSTD_LOGIC_VECTOR(7DOWNTO0));--位选输出
ENDdecoder3_8;
ARCHITECTUREfunOFdecoder3_8IS
SIGNALindata:
STD_LOGIC_VECTOR(2DOWNTO0);
BEGIN
indata<=C&B&A;
encoder:
PROCESS(indata)
BEGIN
CASEindataIS
WHEN"000"=>Y<="01000000";en<="00000001";
WHEN"001"=>Y<="01111001";en<="00000010";
WHEN"010"=>Y<="00100100";en<="00000100";
WHEN"011"=>Y<="00110000";en<="00001000";
WHEN"100"=>Y<="00011001";en<="00010000";
WHEN"101"=>Y<="00010010";en<="00100000";
WHEN"110"=>Y<="00000010";en<="01000000";
WHEN"111"=>Y<="01111000";en<="10000000";
WHENOTHERS=>Y<="11111111";en<="00000000";
ENDCASE;
ENDPROCESSencoder;
ENDfun;
2、分频:
libraryieee;
useieee.std_logic_1164.all;
entitydiv_fis
port(clk:
instd_logic;
miao_out:
outstd_logic;
f_miao_out:
outstd_logic;
fourhz:
outstd_logic;--4Hz输出
halfhz:
outstd_logic;--0.5Hz输出
en:
outstd_logic);
enddiv_f;
architecturemiaoofdiv_fis
begin
en<='1';
p1:
process(clk)
variablecnt:
integerrange0to3999999;
variableff:
std_logic;
begin
ifclk'eventandclk='1'then
ifcnt<3999999then
cnt:
=cnt+1;
else
cnt:
=0;
ff:
=notff;
endif;
endif;
miao_out<=ff;
endprocessp1;
p2:
process(clk)
variablecnn:
integerrange0to1999999;
variabledd:
std_logic;
begin
ifclk'eventandclk='1'then
ifcnn<1999999then
cnn:
=cnn+1;
else
cnn:
=0;
dd:
=notdd;
endif;
endif;
f_miao_out<=dd;
endprocessp2;
------------p3:
4Hz生成部分--------------
p3:
process(clk)
variablecnt0:
integerrange0to999999;
variableaa:
std_logic;
begin
ifclk'eventandclk='1'then
ifcnt0<999999then
cnt0:
=cnt0+1;
else
cnt0:
=0;
aa:
=notaa;
endif;
endif;
fourhz<=aa;
endprocessp3;
--------p4:
0.5Hz生成部分-------------
p4:
process(clk)
variablecnn0:
integerrange0to7999999;
variablebb:
std_logic;
begin
ifclk'eventandclk='1'then
ifcnn0<7999999then
cnn0:
=cnn0+1;
else
cnn0:
=0;
bb:
=notbb;
endif;
endif;
halfhz<=bb;
endprocessp4;
endmiao;
3、点阵
libraryIEEE;
useIEEE.STD_LOGIC_1164.ALL;
useIEEE.STD_LOGIC_ARITH.ALL;
useIEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITYdianzhenIS
PORT(clk:
INSTD_LOGIC;
l:
outSTD_LOGIC_VECTOR(7downto0);
b:
outSTD_LOGIC_VECTOR(7downto0)
);
ENDdianzhen;
ARCHITECTUREledOFdianzhenIS
signalclk_1k:
std_logic;
signalclk_1h:
std_logic;
signalp,c:
integerrange0to7;
BEGIN
-------------与源代码分频方式不同,效果相同-----------
process(clk)
variablecnt0:
integerrange0to24676;
begin
ifclk'eventandclk='1'then
ifcnt0=24676then
cnt0:
=0;
clk_1k<=notclk_1k;
else
cnt0:
=cnt0+1;
endif;
endif;
endprocess;
process(p,clk_1k)
FUNCTIONword(bcd8421:
INTEGERRANGE0TO7)RETURN
STD_LOGIC_VECTORIS
VARIABLEsmg7:
STD_LOGIC_VECTOR(7DOWNTO0);
BEGIN
CASEbcd8421IS
--------实现汉字“中”的编码--------
WHEN0=>smg7:
=X"00";
WHEN1=>smg7:
=X"1C";
WHEN2=>smg7:
=X"14";
WHEN3=>smg7:
=X"FF";
WHEN4=>smg7:
=X"14";
WHEN5=>smg7:
=X"1C";
WHEN6=>smg7:
=X"00";
WHEN7=>smg7:
=X"00";
ENDCASE;
RETURNsmg7;
ENDword;
variablecnt:
integerrange0to63;
begin
ifclk_1k'eventandclk_1k='1'then
p<=p+1;
ifcnt=63then
cnt:
=0;
clk_1h<=notclk_1h;
else
cnt:
=cnt+1;
endif;
endif;
casepis
when0=>b<="11111110";l<=word(c);
when1=>b<="11111101";l<=word(c+1);
when2=>b<="11111011";l<=word(c+2);
when3=>b<="11110111";l<=word(c+3);
when4=>b<="11101111";l<=word(c+4);
when5=>b<="11011111";l<=word(c+5);
when6=>b<="10111111";l<=word(c+6);
when7=>b<="01111111";l<=word(c+7);
endcase;
endprocess;
process(clk_1h)
variablecnt:
integerrange0to7;
begin
ifclk_1h'eventandclk_1h='1'then
c<=c+1;
endif;
endprocess;
endled;
4、流水灯:
LIBRARYIEEE;
USEIEEE.STD_LOGIC_1164.ALL;
USEIEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITYled_lsdIS
PORT(clk:
INSTD_LOGIC;
-----------------------
spd:
inbit;---控制速度----
con:
inbit;---控制方向----
r:
OUTSTD_LOGIC_VECTOR(7DOWNTO0);---点阵行控制
c:
OUTSTD_LOGIC_VECTOR(7DOWNTO0));--点阵列控制
-----------------------
ENDled_lsd;
ARCHITECTUREbehavOFled_lsdIS
SIGNALSLIP:
STD_LOGIC_VECTOR(5DOWNTO0);--------
SIGNALmiao_out:
STD_LOGIC;
begin
-----------------分出两个不同的频率-----------
process(clk)
variablecnt:
integerrange0to399999;
variableff:
std_logic;
variablecnt0:
integerrange0to1000000;
variableff0:
std_logic;
begin
ifclk'eventandclk='1'then
ifcnt<399999then
cnt:
=cnt+1;
else
cnt:
=0;
ff:
=notff;
endif;
ifcnt0<1000000then
cnt0:
=cnt0+1;
else
cnt0:
=0;
ff0:
=notff0;
endif;
endif;
-------速度选择--------
if(spd='1')then
miao_out<=notff;
elsif(spd='0')then
miao_out<=notff0;
endif;
endprocess;
-----------------------------------------------------
PROCESS(miao_out)
BEGIN
IFmiao_out'EVENTANDmiao_out='1'THEN
-----------方向选择控制--------------------------
if(con='1')then
SLIP<=SLIP+1;
elsif(con='0')then
SLIP<=SLIP-1;
endif;
---------------------------------------
ENDIF;
CASESLIPIS
----------------实现LED点阵流水点灯的样式---------
WHEN"000000"=>r<="00000011";c<="11111110";
WHEN"000001"=>r<="00000011";c<="11111101";
WHEN"000010"=>r<="00000011";c<="11111011";
WHEN"000011"=>r<="00000011";c<="11110111";
WHEN"000100"=>r<="00000011";c<="11101111";
WHEN"000101"=>r<="00000011";c<="11011111";
WHEN"000110"=>r<="00000011";c<="10111111";
WHEN"000111"=>r<="00000001";c<="01111111";
WHEN"001000"=>r<="00000010";c<="00111111";
WHEN"001001"=>r<="00000100";c<="00111111";
WHEN"001010"=>r<="00001000";c<="00111111";
WHEN"001011"=>r<="00010000";c<="00111111";
WHEN"001100"=>r<="00100000";c<="00111111";
WHEN"001101"=>r<="01000000";c<="00111111";
WHEN"001110"=>r<="10000000";c<="01111111";
WHEN"001111"=>r<="11000000";c<="10111111";
WHEN"010000"=>r<="11000000";c<="11011111";
WHEN"010001"=>r<="11000000";c<="11101111";
WHEN"010010"=>r<="11000000";c<="11110111";
WHEN"010011"=>r<="11000000";c<="11111011";
WHEN"010100"=>r<="11000000";c<="11111101";
WHEN"010101"=>r<="10000000";c<="11111110";
WHEN"010110"=>r<="01000000";c<="11111100";
WHEN"010111"=>r<="00100000";c<="11111100";
WHEN"011000"=>r<="00010000";c<="11111100";
WHEN"011001"=>r<="00001000";c<="11111100";
WHEN"011010"=>r<="00000100";c<="11111100";
WHEN"011011"=>r<="00000010";c<="11111100";
WHEN"011100"=>r<="00000001";c<="11111110";
WHEN"011101"=>r<="11011011";c<="00100100";
WHEN"011110"=>r<="00000000";c<="11111111";
WHEN"011111"=>r<="11011011";c<="00100100";
WHEN"100000"=>r<="00000001";c<="11111100";
WHEN"100001"=>r<="00000010";c<="11111100";
WHEN"100010"=>r<="00000100";c<="11111100";
WHEN"100011"=>r<="00001000";c<="11111100";
WHEN"100100"=>r<="00010000";c<="11111100";
WHEN"100101"=>r<="00100000";c<="11111100";
WHEN"100110"=>r<="01000000";c<="11111100";
WHEN"100111"=>r<="10000000";c<="11111110";
WHEN"101000"=>r<="11000000";c<="11111101";
WHEN"101001"=>r<="11000000";c<="11111011";
WHEN"101010"=>r<="11000000";c<="11110111";
WHEN"101011"=>r<="11000000";c<="11101111";
WHEN"101100"=>r<="11000000";c<="11011111";
WHEN"101101"=>r<="11000000";c<="10111111";
WHEN"101110"=>r<="10000000";c<="01111111";
WHEN"101111"=>r<="01000000";c<="00111111";
WHEN"110000"=>r<="00100000";c<="00111111";
WHEN"110001"=>r<="00010000";c<="00111111";
WHEN"110010"=>r<="00001000";c<="00111111";
WHEN"110011"=>r<="00000100";c<="00111111";
WHEN"110100"=>r<="00000010";c<="00111111";
WHEN"110101"=>r<="00000001";c<="01111111";
WHEN"110110"=>r<="00000011";c<="10111111";
WHEN"110111"=>r<="00000011";c<="11011111";
WHEN"111000"=>r<="00000011";c<="11101111";
WHEN"111001"=>r<="00000011";c<="11110111";
WHEN"111010"=>r<="00000011";c<="11111011";
WHEN"111011"=>r<="00000011";c<="11111101";
WHEN"111100"=>r<="00000011";c<="11111101";
WHEN"111101"=>r<="11100111";c<="00011000";
WHEN"111110"=>r<="00000000";c<="11111111";
WHEN"111111"=>r<="11100111";c<="00011000";
-----------------------------------------
ENDCASE;
ENDPROCESS;
ENDbehav;
5、步进电机:
libraryIEEE;
useIEEE.STD_LOGIC_1164.ALL;
useIEEE.STD_LOGIC_ARITH.ALL;
useIEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITYstate_machineIS
PORT(
clk:
INstd_logic;
rst:
INstd_logic;
spd:
inbit;---速度控制---
con:
inbit;---方向控制------
c:
OUTstd_logic_vector(3DOWNTO0));
ENDstate_machine;
ARCHITECTUREarchOFstate_machineIS
CONSTANTstate0:
std_logic_vector(2DOWNTO0):
="000";
CONSTANTstate1:
std_logic_vector(2DOWNTO0):
="001";
CONSTANTstate2:
std_logic_vector(2DOWNTO0):
="010";
CONSTANTstate3:
std_logic_vector(2DOWNTO0):
="011";
CONSTANTstate4:
std_logic_vector(2DOWNTO0):
="100";
CONSTANTstate5:
std_logic_vector(2DOWNTO0):
="101";
CONSTANTstate6:
std_logic_vector(2DOWNTO0):
="110";
CONSTANTstate7:
std_logic_vector(2DOWNTO0):
="111";
SIGNALstate:
std_logic_vector(2DOWNTO0);
SIGNALKEY:
std_logic_vector(2DOWNTO0);
BEGIN
PROCESS(clk,rst)
----实现两个分频----------
variablecnt:
integerrange0to5999;----------
variablecnt0:
integerrange0to9999;--------------
variableff:
std_logic;
BEGIN
IF(NOTrst='1')THEN
state<=state0;
cnt:
=0;
cnt0:
=0;
ELSIF(clk'EVENTANDclk='1')THEN
cnt:
=cnt+1;
cnt0:
=cnt0+1;-----
-------根据spd的值实现速度的选择-----------------------
if(spd='1')then
IF(cnt=5999)THEN
CASEstateIS
WHENstate0=>
state<=state1;
WHENstate1=>
state<=state2;
WHENstate2=>
state<=state3;
WHENstate3=>
state<=state4;
WHENstate4=>
state<=state5;
WHENstate5=>
state<=state6;
WHENstate6=>
state<=state7;
WHENstate7=>
state<=state0;
ENDCASE;
ENDIF;
elsif(spd='0')then
IF(cnt0=9999)THEN
CASEstateIS
WHENstate0=>
state<=state1;
WHENstate1=>
state<=state2;
WHENstate2=>
state<=state3;
WHENstate3=>
state<=state4;
WHENstate4=>
state<=state5;
WHENstate5=>
state<=state6;
WHENstate6=>
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