lab3.docx
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lab3.docx
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lab3
AddingCustomIPtotheSystem
Introduction
ThislabguidesyouthroughtheprocessofcreatingandaddingacustomperipheraltoaprocessorsystembyusingtheVivadoIPPackager.YouwillcreateanAXI4Liteinterfaceperipheral.
Objectives
Aftercompletingthislab,youwillbeableto:
∙UsetheIPPackagerfeatureofVivadotocreateacustomperipheral
∙ModifythefunctionalityoftheIP
∙Addthecustomperipheraltoyourdesign
∙Addpinlocationconstraints
∙Addblockmemorytothesystem
Procedure
Thislabisseparatedintostepsthatconsistofgeneraloverviewstatementsthatprovideinformationonthedetailedinstructionsthatfollow.Followthesedetailedinstructionstoprogressthroughthelab.
Thislabcomprises4primarysteps:
Youwilluseaperipheraltemplatetocreateaperipheral,PackagetheIPusingIPPackager,import,addandconnecttheIPinthedesign,andaddtheBlockRAM(BRAM)Memory.
DesignDescription
YouwillextendtheLab2hardwaredesignbycreatingandaddinganAXIperipheral(refertoLED_IPinFigure1)tothesystem,andconnectingittotheLEDsontheZYBOboard.YouwillusetheIPPackagertogeneratethecustomIP.Next,youwillconnecttheperipheraltothesystemandaddpinlocationconstraintstoconnecttheLEDdisplaycontrollerperipheraltotheon-boardLEDdisplay.Finally,youwilladdBRAMControllerandBRAMbeforegeneratingthebitstream.
Figure1.DesignUpdatedfromPreviousLab
GeneralFlowforthisLab
1CreateaCustomIPusingtheCreateandPackageIPWizardStep1
1-1.Usetheprovidedaxi_liteslaveperipheraltemplateandthecustomIPsourcecodetocreateacustomIP.
1-1-1.OpenVivadobyselectingStart>AllPrograms>XilinxDesignTools>Vivado2013.4>Vivado2013.4
1-1-2.ClickManageIPandselectNewIPLocationandclickNextintheNewIPLocationwindow
1-1-3.SelectVerilogastheTargetLanguage,MixedastheSimulatorlanguage,andforIPlocation,typeC:
\xup\embedded\labs\led_ipandclickFinish(leaveothersettingsasdefaults)
Figure2.NewIPLocationform
AVirtex7partischosenforthisproject,butlatercompatibilityforotherdeviceswillbeaddedtothepackagedIPlater.
1-1-4.ClickOKtocreatetheled_ipdirectory.
1-2.RuntheCreateandPackageIPWizard
1-2-1.SelectTools>CreateandPackageIP
1-2-2.Inthewindow,clickNext
1-2-3.SelectCreatenewAXI4peripheral,specifytheIPDefinitionlocationasC:
/xup/embedded/labs/led_ipandclickNext
1-2-4.FillinthedetailsfortheIP
Name:
led_ip
DisplayName:
led_ip_v1_0
(Fillinadescription,VendorName,andURL)
Figure3.UpdatingPeripheralDetailsform
1-2-5.ClickNext
1-2-6.ChangetheNameoftheinterfacetoS_AXI
1-2-7.LeavetheothersettingsasdefaultandclickNext(Liteinterface,Slavemode,DataWidth32,Registers4)
Figure4.NamingtheAXIinterface
1-2-8.SelectGenerateDriversandclickNext
1-2-9.SelectAddIPtoCatalogandopenIPineditingsessionselectedandclickFinish
1-2-10.Inthesourcespanel,double-clicktheled_ip_v1_0.vfileandscrolldowntoline15whereusersportdefinitionspaceisprovided.
1-2-11.Addtheline:
outputwire[3:
0]LED,
(Noticetheextracommaneededattheendofline)
Figure5.Addingusersportdefinition
1-2-12.Insertthefollowingatline~48:
.LED(LED),
Figure6.Addingportconnectionwithalower-levelmodule
1-2-13.SavethefilebyselectingFile>SaveFile
1-2-14.Expandled_ip_v1_0inthesourcesviewifnecessary,andopenled_ip_v1_0_S_AXI.v
1-2-15.AddtheLEDporttothisfiletoo,atline15
Figure7.Declaringusersportinthelower-levelmodule
1-2-16.Scrolldownto~line397andinsertthefollowingcodetoinstantiatetheuserlogicfortheLEDIP
(Thiscodecanbetypeddirectly,orcopiedfromtheuser_logic_instantiation.txtfileinthelab3sourcefolder.)
Figure8.Instantiatinglower-levelusermodule
Checkallthesignalsthatarebeingconnectedandwheretheyoriginate.
1-2-17.SavethefilebyselectingFile>SaveFile
1-2-18.ClickontheAddSourcesintheFlowNavigatorpane,selectAddorCreateDesignSources,browsetoc:
\xup\embedded\sources\lab3,selectthelab3_user_logic.vfileandclickOK,andthenclickFinishtoaddthefile.
Checkthecontentsofthisfiletounderstandthelogicthatisbeingimplemented.Noticetheformedhierarchy.
1-2-19.ClickRunSynthesisandSaveifprompted.(ThisistocheckthedesignsynthesizescorrectlybeforepackagingtheIP.
1-2-20.ChecktheMessagestabforanyerrorsandcorrectifnecessarybeforemovingtothenextstep
WhenSynthesiscompletessuccessfully,clickCancel.
ItisimportantthatallsourcefilesthattheIPwillusebelocatedundertheIPproject.
1-3.UpdatetheIPprojectwiththenecessarysourcefilesintheappropriatedirectory
1-3-1.Expandthesourcehierarchy,ifneeded,andselectlab3_user_logicentry.
1-3-2.Right-clickandselectRemoveFilefromtheProject.
1-3-3.ClickOKtoremovethefile.
Similarly,removeallthefileswhichwereaddedfromoutsidetheprojectdirectory.Inthislab,youdon’thavemorefilestoberemoved.
1-3-4.UsingWindowsExplorer,copythelab3_user_logic.vfilefromthec:
\xup\embedded\sources\lab3directoryandpasteitinthecurrentIPprojectdirectoryatc:
\xup\embedded\labs\led_ip\led_ip_1.0\hdldirectory.
1-3-5.ClickontheAddSourcesintheFlowNavigatorpane,selectAddorCreateDesignSources,browsetoc:
\xup\embedded\labs\led_ip\led_ip_1.0\hdl,selectthelab3_user_logic.vfileandclickOK,andthenclickFinishtoaddthefile.
MakesurethatyouselectthefilefromtheIPprojectdirectoryandnotthesources\lab3directory.
1-4.PackagetheIP
1-4-1.ClickonthePackageIP–led_iptab
1-4-2.FortheIPtoappearintheIPcataloginparticularcategories,theIPmustbeconfiguredtobepartofthosecategories.TochangewhichcategoriestheIPwillappearintheIPcatalogclickthebrowseboxontheCategoriesline.ThisopenstheChooseIPCategorieswindow
1-4-3.Fortheexercisepurpose,unchecktheAXIPeripheralboxandchecktheBasicElementsandclickOK.
Figure9.SpecifythecategoryforIPPackagerIP
1-4-4.SelectIPCompatibility.ThisshowsthedifferentXilinxFPGAFamiliesthattheIPsupports.Thevalueisinheritedfromthedeviceselectedfortheproject.
1-4-5.RightclickintheFamilySupporttableandselectAddFamily…fromthemenu.
1-4-6.SelecttheZynqfamilyaswewillbeusingthisIPontheZYBOboard,andclickOK.
1-4-7.YoucanalsocustomizetheaddressspaceandaddmemoryaddressspaceusingtheIPAddressingandMemorycategory.Wewon’tmakeanychanges.
1-4-8.ClickonIPFileGroupsandclickMergechangesfromIPFileGroupsWizard
Figure10.Updatingthefilegroup
ThisistoupdatetheIPPackagerwiththechangesthatweremadetotheIPandthelab3_user_logic.vfilethatwasaddedtotheproject.
1-4-9.DothesameforIPCustomizationParameters(MergechangesfromIPCustomizationParametersWizard)
NoticethattheIPPortsviewnowshowstheusercreatedLEDport
Figure11.Userportimported
1-4-10.SelectReviewandPackage,andnoticethepathwheretheIPwillbecreated.
Figure12.IPlocation
1-4-11.ClickRe-PackageIP
Youwillseeawarningmessageindicatingthattheled_ipdirectoryisalreadyintheproject.ClickOKtoignoreit.
1-4-12.IntheVivadowindowclickFile>CloseProject
2ModifytheProjectSettingsStep3
2-1.Openthepreviousproject,orusethelab2projectfromthelabsolutiondirectory,andsavetheprojectaslab3.SetProjectSettingstopointtothecreatedIPrepository.
2-1-1.StarttheVivadoifnecessaryandopeneitherthelab2projectyoucreatedinthepreviouslaborthelab2projectinthelabsolutiondirectory
2-1-2.SelectFile>SaveProjectAs…toopentheSaveProjectAsdialogbox.Enterlab3astheprojectname.MakesurethattheCreateProjectSubdirectoryoptionischecked,theprojectdirectorypathisc:
\xup\embedded\labs\andclickOK.
Thiswillcreatethelab3directoryandsavetheprojectandassociateddirectorywithlab3name.
2-1-3.ClickProjectSettingsintheFlowNavigatorpane.
2-1-4.SelectIPintheleftpaneoftheProjectSettingsform.
2-1-5.ClickontheAddRepository…button,browsetoc:
\xup\embedded\labs\led_ipandclickSelect.
Theled_ip_v1_0IPwillappeartheIPintheSelectedRepositorywindow.
Figure13.SpecifyIPRepository
2-1-6.ClickOK.
3AddtheCustomIP,BRAM,andtheConstraintsStep4
3-1.Addled_iptothedesignandconnecttotheAXI4LiteinterconnectintheIPI.Makeinternalandexternalportconnections.EstablishtheLEDportasexternalFPGApins.
3-1-1.ClickOpenBlockDesignunderIPIntegratorintheFlowNavigatorpane,andselectsystem.bdtoopenIPIntegrator
3-1-2.ClicktheAddIPicon
andsearchforled_ip_v1_0inthecatalogbytyping“led”inthesearchfield.
Figure12.Searchingforled_ipintheIPCatalog
3-1-3.Double-clickled_ip_v1_0toaddthecoretothedesign.
3-1-4.SelecttheIPintheblockdiagramandchangetheinstancenametoled_ipinthepropertiesview.
3-1-5.ClickonRunConnectionAutomation,select/led_ip/S_AXIandclickOKtoautomaticallymaketheconnectionfromtheAXIInterconnecttotheIP.
3-1-6.Clicktheregeneratebutton(
)toredrawthediagram.
Figure13.LEDIPBlockaddedandconnected
3-1-7.SelecttheLED[3:
0]portontheled_ipinstance(byclickingonitspin),right-clickandselectMakeExternal.
Figure14.LEDexternalportaddedandconnected
3-1-8.SelecttheAddressEditortabandverifythatanaddresshasbeenassignedtoled_ip.
Figure15.Addressassignedforled_ip
3-2.AddBRAMtothedesign
3-
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