整理LCD计数显示程序.docx

整理LCD计数显示程序.docx

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整理LCD计数显示程序

libraryIEEE;

useIEEE.STD_LOGIC_1164.ALL;

useIEEE.STD_LOGIC_ARITH.ALL;

useIEEE.STD_LOGIC_UNSIGNED.ALL;

----Uncommentthefollowinglibrarydeclarationifinstantiating

----anyXilinxprimitivesinthiscode.

--libraryUNISIM;

--useUNISIM.VComponents.all;

entitycounteris

Port（clk:

instd_logic;

resetn:

instd_logic;

dout:

outstd_logic_vector（7downto0）;

lcd_en:

outstd_logic;

lcd_rs:

outstd_logic;

lcd_rw:

outstd_logic）;

endcounter;

architectureBehavioralofcounteris

componentcounter60is

Port（clk:

instd_logic;

resetn:

instd_logic;

dout:

outstd_logic_vector（7downto0））;

endcomponent;

componentdecoderis

Port（din:

instd_logic_vector（3downto0）;

dout:

outstd_logic_vector（8downto0））;

endcomponent;

componentlcd_interfaceis

port（

clk:

instd_logic;

resetn:

instd_logic;

dout_s10:

instd_logic_vector（8downto0）;

dout_s1:

instd_logic_vector（8downto0）;

lcd_data:

outstd_logic_vector（7downto0）;

lcd_en:

outstd_logic;

lcd_rs:

outstd_logic;

lcd_rw:

outstd_logic

）;

endcomponent;

signalddout_s10:

std_logic_vector（8downto0）;

signalddout_s1:

std_logic_vector（8downto0）;

signalddout:

std_logic_vector（7downto0）;

begin

u1:

counter60portmap（clk,resetn,ddout）;

u2:

decoderportmap（ddout（7downto4）,ddout_s10）;

u3:

decoderportmap（ddout（3downto0）,ddout_s1）;

u4:

lcd_interfaceportmap（clk,resetn,ddout_s10,ddout_s1,dout,lcd_en,lcd_rs,lcd_rw）;

endBehavioral;

--------------------------------------------------------------------------------

--Company:

--Engineer:

--

--CreateDate:

13:

36:

1003/30/06

--DesignName:

--ModuleName:

count60-Behavioral

--ProjectName:

--TargetDevice:

--Toolversions:

--Description:

--

--Dependencies:

--

--Revision:

--Revision0.01-FileCreated

--AdditionalComments:

--

--------------------------------------------------------------------------------

libraryIEEE;

useIEEE.STD_LOGIC_1164.ALL;

useIEEE.STD_LOGIC_ARITH.ALL;

useIEEE.STD_LOGIC_UNSIGNED.ALL;

entitycounter60is

Port（clk:

instd_logic;

resetn:

instd_logic;

dout:

outstd_logic_vector（7downto0））;

endcounter60;

architectureBehavioralofcounter60is

signalcount:

std_logic_vector（7downto0）;

signalcount_div:

std_logic_vector（25downto0）;

begin

dout<=count;

process（clk）

begin

if（clk'eventandclk='1'）then

if（resetn='0'）then

count_div<=（others=>'0'）;

elseif（count_div（25）='1'）then

count_div<=（others=>'0'）;

else

count_div<=count_div+1;

endif;

endif;

endif;

endprocess;

process（clk,resetn）

begin

ifresetn='0'then

count<=（others=>'0'）;

elsifrising_edge（clk）then

if（count_div（25）='1'）then

ifcount（3downto0）="1001"then

count（3downto0）<="0000";

count（7downto4）<=count（7downto4）+1;

else

count（3downto0）<=count（3downto0）+1;

endif;

ifcount="01011001"then

count<="00000000";

endif;

endif;

endif;

endprocess;

endBehavioral;

--------------------------------------------------------------------------------

--Company:

--Engineer:

--

--CreateDate:

13:

25:

3703/30/06

--DesignName:

--ModuleName:

decoder-Behavioral

--ProjectName:

--TargetDevice:

--Toolversions:

--Description:

--

--Dependencies:

--

--Revision:

--Revision0.01-FileCreated

--AdditionalComments:

--

--------------------------------------------------------------------------------

libraryIEEE;

useIEEE.STD_LOGIC_1164.ALL;

useIEEE.STD_LOGIC_ARITH.ALL;

useIEEE.STD_LOGIC_UNSIGNED.ALL;

entitydecoderis

Port（din:

instd_logic_vector（3downto0）;--四位二进制码输入

dout:

outstd_logic_vector（8downto0））;--输出LED七段码

enddecoder;

architectureBehavioralofdecoderis

begin

process（din）

begin

casedinis

when"0000"=>dout<="100110000";--30

when"0001"=>dout<="100110001";--31

when"0010"=>dout<="100110010";--32

when"0011"=>dout<="100110011";--33

when"0100"=>dout<="100110100";--34

when"0101"=>dout<="100110101";--35

when"0110"=>dout<="100110110";--36

when"0111"=>dout<="100110111";--37

when"1000"=>dout<="100111000";--38

when"1001"=>dout<="100111001";--39

whenothers=>dout<="100100000";

endcase;

endprocess;

endBehavioral;

libraryieee;

useieee.std_logic_1164.all;

useieee.std_logic_arith.all;

useieee.std_logic_unsigned.all;

entitylcd_interfaceis

port（

clk:

instd_logic;

resetn:

instd_logic;

dout_s10:

instd_logic_vector（8downto0）;

dout_s1:

instd_logic_vector（8downto0）;

lcd_data:

outstd_logic_vector（7downto0）;

lcd_en:

outstd_logic;

lcd_rs:

outstd_logic;

lcd_rw:

outstd_logic

）;

endlcd_interface;

architecturelcd_interface_archoflcd_interfaceis

signallcd_we_n:

std_logic;

signallcd_en_int:

std_logic;

signalw_comp_n:

std_logic;

signalseq_count:

std_logic_vector（5downto0）;

signallcd_rs_data:

std_logic_vector（8downto0）;

signaldelay_count:

std_logic_vector（15downto0）;

signallcd_addr:

std_logic_vector（5downto0）;

typestate_lcd_write_typeis（lcd_write_idle,lcd_write_1,lcd_write_2,lcd_write_3,lcd_write_4）;

signalstate_lcd_write:

state_lcd_write_type;

typestate_typeis（idle,wait_1,wait_2,state_1,state_2,state_3,done）;

signalstate:

state_type;

begin

--ThefollowingstatemachineinitializestheLCDandwritesthefollowingmessage

--totheLCDpanel

--MemecDesign

--MB1000Board

--

--

--TheLCDinitializationsequenceconsistofwritingthe0x38,0x38,0x06,0x0e,

--0x01,0x80,0xc0sequenceofhexnumberstotheLCDcontrolregisters（please

--refertotheLCDdatasheetforanexplanationoftheinitializationsequence）.

--AttheendoftheLCDinitializationsequence,theLCDisreadytobewritten

--tostartingwithline1.Itshouldbenotedthatdelaysareinsertedbetween

--2writestotheLCDpaneltomeettheLCDinitializationrequirements.Although,

--theLCDpanelrequiresdifferentdelaysbetween2writes,afixdelayof20msis

--insertedbetween2writestosimplytheinitializationdesign（the20msisthe

--longestdelaythatisrequiredbytheLCDpanel）.A22-bitcounterisusedto

--generatethisfixdelay.

sequencer_state_register:

process（clk,resetn）

begin

if（resetn='0'）then

state<=idle;

elsif（clk'eventandclk='1'）then

casestateis

whenidle=>

if（delay_count（15）='1'）then

state<=wait_1;

else

state<=idle;

endif;

whenwait_1=>

if（delay_count（15）='1'）then

state<=state_1;

else

state<=wait_1;

endif;

whenstate_1=>

state<=state_2;

whenstate_2=>

if（（w_comp_n='0'）and（lcd_addr="000110"））then

state<=wait_2;

elsif（w_comp_n='0'）then

state<=wait_1;

else

state<=state_2;

endif;

--ThefollowingsectionsperformsthewritingoftheabovemessagetotheLCD

--panel.Similartotheinitializationsection,afixdelayisinsertedbetween

--2LCDwrites.The22-bitcounterusedintheinitializationsectionisalso

--usedheretogeneratethefixdelay.

whenwait_2=>

if（delay_count（15）='1'）then

state<=state_3;

else

state<=wait_2;

endif;

whenstate_3=>

if（（w_comp_n='0'）and（lcd_addr="100111"））then

state<=done;

elsif（w_comp_n='0'）then

state<=wait_2;

else

state<=state_3;

endif;

whendone=>

state<=done;

endcase;

endif;

endprocesssequencer_state_register;

--Thefollowingsectiongeneratesawriteenable（lcd_we_n）signalbasedonthe

--stateoftheabovestatemachinethatisusedtogeneratethelcd_ensignal.

sequencer_state_logic:

process（state）

begin

casestateis

whenidle=>

lcd_we_n<='1';

whenwait_1=>

lcd_we_n<='1';

whenwait_2=>

lcd_we_n<='1';

whenstate_1=>

lcd_we_n<='0';

whenstate_2=>

lcd_we_n<='0';

whenstate_3=>

lcd_we_n<='0';

whendone=>

lcd_we_n<='1';

endcase;

endprocesssequencer_state_logic;

--Thefollowingsectionsusesthelcd_we_nsignaltogeneratethelcd_ensignaland

--awritecompletesignal（w_comp_n）.Thew_comp_nsignalisusedtoresetvarious

--countersthatareusedtogenerateLCDcontrolsignals.

state_lcd_write_register:

process（clk,resetn）

begin

if（resetn='0'）then

state_lcd_write<=lcd_write_idle;

elsif（clk'eventandclk='1'）then

casestate_lcd_writeis

whenlcd_write_idle=>

if（lcd_we_n='0'）then

state_lcd_write<=lcd_write_1;

else

state_lcd_write<=lcd_write_idle;

endif;

whenlcd_write_1=>

if（seq_count="000101"）then

state_lcd_write<=lcd_write_2;

else

state_lcd_write<=lcd_write_1;

endif;

whenlcd_write_2=>

if（seq_count="011110"）then

state_lcd_write<=lcd_write_3;

else

state_lcd_write<=lcd_write_2;

endif;

whenlcd_write_3=>

if（seq_count="110010"）then

state_lcd_write<=lcd_write_4;

else

state_lcd_write<=lcd_write_3;

endif;

whenlcd_write_4=>

state_lcd_write<=lcd_write_idle;

endcase;

endif;

endprocessstate_lcd_write_register;

state_lcd_write_logic:

process（state_lcd_write）

begin

casestate_lcd_writeis

whenlcd_write_idle=>

lcd_en_int<='0';

w_comp_n<='1';

whenlcd_write_1=>

lcd_en_int<='0';

w_comp_n<='1';

whenlcd_write_2=>

lcd_en_int<='1';

w_comp_n<='1';

whenlcd_write_3=>

lcd_en_int<='0';

w_comp_n<='1';

whenlcd_write_4=>

lcd_en_int<='0';

w_comp_n<='0';

endcase;

endprocessstate_lcd_write_logic;

--ThefollowingprocessprovidestheLCDinitializationdataandalsotheASCII

--charactersneededtowritethe"MemecDesignMB1000Board"totheLCDpanel.Once,

--the"MemecDesign"iswrittentothefirstline