东南大学信息学院 poc实验报告Word文档下载推荐.docx
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东南大学信息学院 poc实验报告Word文档下载推荐.docx
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Aftersendingcharactertoprinter,POCsetstheSR7to1,sinceSR0=1,theinterruptrequestsignal(IRQ)issetto0,whichindicateaneffectiveinterruptsignaltotheprocessor.
1、processorsetsthevalueofSR7&
setsthevalueofBR
①WhentheprocessordetectstheeffectiveIRQsignal,theprocessordirectlyselectsBRandwritesacharacterintoBR,(processorwillneverreadthestateofSR7,whichisdifferentwithpollingmode.)
②ThentheprocessorsetstheSR7to0,whichindicatesthatthenewcharacterhasbeenwritteninto
BRandnotprintedyet.
2、POCreadsandsetsthevalueofSR7&
handshakesoperationswiththeprinter
①WhenPOCdetectsthatSR7issetto0,POCthenproceedstostartthehandshakingoperationswiththeprinter.
②Aftersendingcharactertoprinter,POCsetstheSR7to1,whichindicatesPOCisreadytoreceiveanothercharacterfromtheprocessor.Thetransfercyclecannowrepeat.〔①and②aresamewiththepollingstate〕
PS:
DuringthehandshakingoperationsbetweenPOCandprinter,theprocessordoesnottrytoaccessPOCuntilitreceivestheinterruptrequestsignal
3.TheoverallconnectionofthesimulatedprinterandPOCexpressedinthetopmoduleform
Figure3.Thetopmoduleformoftheproject
4.Designdescriptionofthesimulationinputwaveforms
TheinputandoutputofCPU,POCandprinterareshownbelow:
Processorj
Pins
Description
Input
clk
InputtheclockfortheCPUrunning.
mode
Choosethemodeforprinting.
Whenmode=’1’,selectainterruptmode.
IRQ
ReceivetheinterruptsignalIRQ.
WhenIRQ='
1'
newdatacanbesent.
DIN[7..0]
Readdatafrompoc.
DOUT[7..0]
Writedataintopoc.
Output
rw
ShowthedirectionoftheDOUT[7..0]andDIN[7..0]Whenrw='
0'
readdatafromPOC.
When'
rw'
='
writedatatoPOC.
A0
ControltheaddressreadandwriteonPOC.
WhenA0='
chooseSR.
chooseBR.
CS
CS=‘1’,pocwork.
data[7..0]
ThedatasendtoPOCtobeprinted
POC
InputtheclockforthePOCrunning.
RW
senddatatoCPU.
When'
readdatafromCPU.
Inputaddress,
chooseBR.WhenA0='
chooseSR.
RDY
Inputthereadysignalfromprinter.WhenRDY='
theprinterisidle.
WhenRDY='
theprinterisbusy.
InputthemodeofthePOC.
WhenCS=’0’,selectapollingmode.WhenCS=’1’,selectainterruptmode.
ThedatareceivefromCPUtobeprinted.
PD[7..0]
Outputthedatatoprinter.
OutputtheinterruptsignalIRQtoCPU,
showingthePOCandprinterisready.
TR
Theresponsetoprint'
RDYsignal,aone-cyclepulseattheportTR
(transferrequest)showsthatnewdataissenttoprinter.
CS=0POCsendthestateofSRtoCPU;
CS=1CPUreadthedatawriteinBR
Signal
SR[7..0]
TheregistercontainstheflagsforthePOC.WhenSR(7)='
it'
sidle.
WhenSR(7)='
sbusy.
BR[7..0]
Theregisterholdsthevalueofdatatoprint.
printer
Inputtheclockfortheprinterrunning.
InputthepulsesignalfromPOC,toshownewdataising.
InputthedatafromPOC.
OutputRDYsignal,
whenRDY='
itshowsprinteriswaitingfornewdata.
5.Simulationresults
Connectionbetweencpuandpoc
Connectionbetweenpocandprinter
Herearetheexplanationsofthesimulationwave:
interruptmode:
1、Intheinterruptmode,modeisalwaysset1,theprintprocessoccuresbytheIRQsignalfrompoc.
2、WhenS(7)=0,IRAsend‘0’tocpu,itmeansthereisaprintrequirementandcpubegintohandleit.
3、IntheinterruptprocessRWandA0aresingalsfromcputopoctocontroltheactionofpoc.
RW=’1’andA0=’1’writedatafromcpu(D)topoc(BR),meansthebeginoftheinterruptprocess.
RW=’x’andA0=’x’meansthereisnointerruptrequirement.
4、AftersendingdatastoBRandsetsrto“00000000〞,ifRDY=’1’,pocgiveaimpulseinTRtomaketheprinterbegintowork.AftertheTRsignalwecanseethattheinputRDYsignalfromtheprinterchangefrom1to0,whichshowsthattheTRsignalreallymaketheprinterwork.
5、AfterdataofBRhasbeentransmittedintoprinter,pocsetSRto“10000001〞itselftoindicatethatitestoreadyandcangetthenextprinttask.
6、Letdataplus1toindicatethenextnewprintcycle.
6.ConclusionandDiscussions
1、Asaparalleloutputcontroller,pocmoduletoactasaninterfacebetweencpuandprinter.Formthesimulationwave,wecanseethatmyprogrammeetsthedesignsrequirements.
2、Idividethesystemintothreeparts,andonetopentity.AndIusetwowaytofinish
thetopentity.Oneiswriteprogramwithvhdllanguageandanotheriscreatea
schematictypefileandconnectwire.
3、BydesigningthePOCmodule,IfindithelpstolearnhowtouseofquartusandVHDLfordesignandsimulation.Theprocessofdesigningalsoteachsmetheimportantceoffiguringoutthestruc-tureandtimingofthetaskbeforeprogramming.
Appendix:
Theprogramofprocessor:
libraryIEEE;
useIEEE.STD_LOGIC_1164.ALL;
useieee.std_logic_arith.all;
useieee.std_logic_unsigned.all;
--Unmentthefollowinglibrarydeclarationifusing
--arithmeticfunctionswithSignedorUnsignedvalues
--useIEEE.NUMERIC_STD.ALL;
--Unmentthefollowinglibrarydeclarationifinstantiating
--anyXilinxprimitivesinthiscode.
--libraryUNISIM;
--useUNISIM.Vponents.all;
entityprocessoris
port
(
clk:
instd_logic;
IRQ:
DOUT:
outstd_logic_vector(7downto0):
="
00000000"
;
RW:
outstd_logic:
--0read,1write
A0:
--0sr,1br
DIN:
instd_logic_vector(7downto0)
);
endprocessor;
architectureBehavioralofprocessoris
signaldata:
std_logic_vector(7downto0):
signalmode:
std_logic:
--默认为中断模式
begin
process(clk)
begin
ifclk'
eventandclk='
then
ifmode='
ifIRQ='
A0<
RW<
--写入数据到BR
data<
=data+"
00000001"
--代表传输的字符
DOUT<
=data;
else
X'
--读入SR的数据
endif;
endif;
endprocess;
endBehavioral;
theprogramofpoc:
useieee.std_logic_arith.ALL;
useieee.std_logic_unsigned.ALL;
entitypocis
CS:
instd_logic:
RDY:
outstd_logic_vector(7downto0);
PD:
TR:
endpoc;
architectureBehavioralofpocis
signalSR:
std_logic_vector(7downto0):
10000001"
signalBR:
signalcount:
integerrange0to5:
=0;
typestate_typeis(s0,s1,s2);
signalstate:
state_type:
=s0;
then
TR<
IRQ<
casestateis
whens0=>
----中断请求信号
ifSR(7)='
--中断请求
state<
=s1;
else
state<
=s2;
--无中断请求
whens1=>
----读入读出选择
ifRW='
andA0='
then--cpu写入数据到BR
BR<
=DIN;
SR(7)<
elsifRW='
then--cpu读入SR的数据
=SR;
then--cpu写入数据到SR
SR<
then--cpu读入BR的数据
=BR;
whens2=>
----打印机
ifRDY='
PD<
endcase;
theprogramofprinter:
--anyX
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