中英文文献翻译论文at89s52单片机应用文档格式.docx

中英文文献翻译论文at89s52单片机应用文档格式.docx

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8KbytesofFlash,256bytesofRAM,32I/Olines,Watchdogtimer,twodatapointers,three16-bittimer/counters,asix-vectortwo-levelinterruptarchitecture,afullduplexserialport,on-chiposcillator,andclockcircuitry.Inaddition,theAT89S52isdesignedwithstaticlogicforoperationdowntozerofrequencyandsupportstwosoftwareselectablepowersavingmodes.TheIdleModestopstheCPUwhileallowingtheRAM,timer/counters,serialport,andinterruptsystemtocontinuefunctioning.ThePower-downmodesavestheRAMcon-tentsbutfreezestheoscillator,disablingallotherchipfunctionsuntilthenextinterruptorhardwarereset.

PinDescription

VCC：

Supplyvoltage.

GND：

Ground.

Port0：

Port0isan8-bitopendrainbidirectionalI/Oport.Asanoutputport,eachpincansinkeightTTLinputs.When1sarewrittentoport0pins,thepinscanbeusedashigh-impedanceinputs.Port0canalsobeconfiguredtobethemultiplexedlow-orderaddress/databusduringaccessestoexternalprogramanddatamemory.Inthismode,P0hasinternalpull-ups.Port0alsoreceivesthecodebytesduringFlashprogrammingandoutputsthecodebytesdur-ingprogramverification.Externalpull-upsarerequiredduringprogramverification.

Port1：

Port1isan8-bitbidirectionalI/Oportwithinternalpull-ups.ThePort1outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort1pins,theyarepulledhighbytheinter-nalpull-upsandcanbeusedasinputs.Asinputs,Port1pinsthatareexternallybeingpulledlowwillsourcecurrent（IIL）becauseoftheinternalpull-ups.Inaddition,P1.0andP1.1canbeconfiguredtobethetimer/counter2externalcountinput（P1.0/T2）andthetimer/counter2triggerinput（P1.1/T2EX）,respectively,asshowninthefollow-ingtable1.Port1alsoreceivesthelow-orderaddressbytesduringFlashprogrammingandverification.

Table1ThesecondfunctionoftheP1port

PortPin

AlternateFunctions

P1.0

T2（externalcountinputtoTimer/Counter2）,clock-out

P1.1

T2EX（Timer/Counter2capture/reloadtriggeranddirectioncontrol）

P1.5

MOSI（usedforIn-SystemProgramming）

P1.6

MISO（usedforIn-SystemProgramming）

P1.7

SCK（usedforIn-SystemProgramming）

Port2：

Port2isan8-bitbidirectionalI/Oportwithinternalpull-ups.ThePort2outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort2pins,theyarepulledhighbytheinter-nalpull-upsandcanbeusedasinputs.Asinputs,Port2pinsthatareexternallybeingpulledlowwillsourcecurrent（IIL）becauseoftheinternalpull-ups.Port2emitsthehigh-orderaddressbyteduringfetchesfromexternalprogrammemoryanddur-ingaccessestoexternaldatamemorythatuse16-bitaddresses（MOVX@DPTR）.Inthisapplication,Port2usesstronginternalpull-upswhenemitting1s.Duringaccessestoexternaldatamemorythatuse8-bitaddresses（MOVX@RI）,Port2emitsthecontentsoftheP2SpecialFunctionRegister.Port2alsoreceivesthehigh-orderaddressbitsandsomecontrolsignalsduringFlashprogram-mingandverification.

Port3：

Port3isan8-bitbidirectionalI/Oportwithinternalpull-ups.ThePort3outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort3pins,theyarepulledhighbytheinter-nalpull-upsandcanbeusedasinputs.Asinputs,Port3pinsthatareexternallybeingpulledlowwillsourcecurrent（IIL）becauseofthepull-ups.Port3receivessomecontrolsignalsforFlashprogrammingandverification.Port3alsoservesthefunctionsofvariousspecialfeaturesoftheAT89S52,asshowninthefol-lowingtable2.

Table2ThesecondfunctionoftheP3port

P3.0

RXD（serialinputport）

P3.1

TXD（serialoutputport）

P3.2

（externalinterrupt0）

P3.3

（externalinterrupt1）

P3.4

T0（timer0externalinput）

P3.5

T1（timer1externalinput）

P3.6

（externaldatamemorywritestrobe）

P3.7

（externaldatamemoryreadstrobe）

RST：

Resetinput.Ahighonthispinfortwomachinecycleswhiletheoscillatorisrunningresetsthedevice.Thispindriveshighfor98oscillatorperio