verilog简单交通灯实现Word文档格式.docx
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verilog简单交通灯实现Word文档格式.docx
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0]state,next_state;
parameterstate0=2'
b00,state1=2'
b01,state2=2'
b10,state3=2'
b11;
regclk1khz,clk1hz;
reg[3:
0]one,ten;
0]cnt;
0]data;
0]seg7_temp;
regr1,r2,g1,g2,y1,y2;
reg[14:
0]count1;
reg[8:
0]count2;
rega;
0]qh,ql;
initialscan<
=8'
b00000000;
always@(posedgeclk)
begin
if(count1=='
d25000)
beginclk1khz<
=~clk1khz;
count1<
=0;
end
else
begincount1<
=count1+1'
b1;
end
always@(posedgeclk1khz)
begin
if(count2=='
d500)
beginclk1hz<
=~clk1hz;
count2<
begincount2<
=count2+1'
always@(posedgeclk1hz)
state=next_state;
case(state)
state0:
if(jin)
begin
if(!
a)
beginqh<
='
b0011;
ql<
b0101;
a<
=1;
r1<
y1<
g1<
r2=1;
y2<
g2<
end
else
beginif(!
qh&
&
!
ql)
beginnext_state<
=state1;
qh<
b0000;
end
elseif(!
beginql<
b1001;
qh<
=qh-1'
else
=ql-1'
end
end
end
end
state1:
begin
if(!
=state2;
end
else
beginql<
end
state2:
if(jin)
b0010;
r2=0;
=state3;
state3:
=state0;
endcase
one<
=ql;
ten<
=qh;
//--------------------
always@(jin,clk1hz,r1,r2,g1,g2,y1,y2,seg7_temp)
if(!
jin)
beginra<
=r1||jin;
rb<
=r2||jin;
ga<
=g1&
jin;
gb<
=g2&
ya<
=y1&
yb<
=y2&
seg7[0]<
=seg7_temp[0]||clk1hz;
seg7[1]<
=seg7_temp[1]||clk1hz;
seg7[2]<
=seg7_temp[2]||clk1hz;
seg7[3]<
=seg7_temp[3]||clk1hz;
seg7[4]<
=seg7_temp[4]||clk1hz;
seg7[5]<
=seg7_temp[5]||clk1hz;
seg7[6]<
=seg7_temp[6]||clk1hz;
seg7[7]<
=seg7_temp[7]||clk1hz;
end
beginseg7[7:
0]<
=seg7_temp[7:
0];
ra<
=r1;
=r2;
ga<
=g1;
gb<
=g2;
ya<
=y1;
yb<
=y2;
//-----------------
if(cnt=='
b01)
begincnt<
b00;
elsebegincnt<
=cnt+1'
always@(cnt,one,ten)
case(cnt)
'
b00:
begindata[3:
=ten;
scan<
b01111111;
b01:
=one;
b10111111;
default:
bx;
always@(data)
case(data[3:
0])
4'
b0000:
seg7_temp[7:
b11000000;
b0001:
b11111001;
b0010:
b10100100;
b0011:
b10110000;
b0100:
b10011001;
b0101:
b10010010;
b0110:
b10000010;
b0111:
b11111000;
b1000:
b10000000;
b1001:
b10010000;
b10000110;
endmodule
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