数字电路与逻辑设计12PPT文档格式.ppt

数字电路与逻辑设计12PPT文档格式.ppt

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,DigitalFundamentalsTenthEditionFloyd,Chapter12,Summary,Mostinputsignalstoanelectronicsystemstartoutasanalogsignals.Forprocessing,thesignalisnormallyconvertedtoadigitalsignalbysamplingtheinput.,Sampling,Beforesampling,theanaloginputmustbefilteredwithalow-passanti-aliasingfilter.Thefiltereliminatesfrequenciesthatexceedacertainlimitthatisdeterminedbythesamplingrate.,Summary,Tounderstandtheneedforananti-aliasingfilter,youneedtounderstandthesamplingtheoremwhichessentiallystates:

@#@,Anti-aliasingFilter,wherefsample=samplingfrequency,fa（max）=highestharmonicintheanalogsignal,Statedasanequation,fsample2fa（max）,Inordertorecoverasignal,thesamplingratemustbegreaterthantwicethehighestfrequencyinthesignal.,Ifthesignalissampledlessthanthis,therecoveryprocesswillproducefrequenciesthatareentirelydifferentthanintheoriginalsignal.These“masquerading”signalsarecalledaliases.,Summary,Theanti-aliasingfilterisalow-passfilterthatlimitshighfrequenciesintheinputsignaltoonlythosethatmeettherequirementsofthesamplingtheorem.,Anti-aliasingFilter,Unfilteredanalogfrequencyspectrum,Overlapcausesaliasingerror,f,fsample,Samplingfrequencyspectrum,Thefilterscutofffrequency,fc,shouldbelessthanfsample.,Toprocessnaturallyoccurringanalogquantitieswithadigitalsystem,theanalogsignalisconvertedtodigitalformaftertheanti-aliasingfilter.,Summary,Analog-to-DigitalConversion,Thefirststepinconvertingasignaltodigitalformistouseasample-and-holdcircuit.Thiscircuitsamplestheinputsignalataratedeterminedbyaclocksignalandholdsthelevelonacapacitoruntilthenextclockpulse.,Apositivehalf-wavefrom0-10Visshowninblue.Thesample-and-holdcircuitproducesthestaircaserepresentationshowninred.,0V,10V,Summary,Thesecondstepistoquantizethesestaircaselevelstobinarycodedformusingananalog-to-digitalconverter（ADC）.Thedigitalvaluescanthenbeprocessedbyadigitalsignalprocessororcomputer.,0V,10V,Example,Whatisthemaximumunsignedbinaryvalueforthewaveform?

@#@,Solution,10V=10102V.Thetableliststhequantizedbinaryvaluesforallofthesteps.,Peak=10V,Analog-to-DigitalConversion,Summary,Mostsignalshavehigherfrequencyharmonicandnoise.FormostADCs,thesamplingandfiltercutofffrequenciesareselectedtobeabletoreconstructthedesiredsignalwithoutincludingunnecessaryharmonicsandnoise.,Anti-aliasingFilter,AnexampleofareasonablesamplingrateisinadigitalaudioCD.ForaudioCDs,samplingisdoneat44.1kHzbecauseaudiofrequenciesabove20kHzarenotdetectablebytheear.,Question,Whatcutofffrequencyshouldananti-aliasingfilterhaveforadigitalaudioCD?

@#@,Answer,Lessthan22.05kHz.,Summary,Sample-and-HoldandADC,Followingtheanti-aliasingfilter,isthesample-and-holdcircuitandtheanalog-to-digitalconverter.Atthispoint,theoriginalanalogsignalhasbeenconvertedtoadigitalsignal.,ManyICscanperformbothfunctionsonasinglechipandincludetwoormorechannels.Foraudioapplications,theAD1871isanexampleofastereoaudioADC.,Samplesheldforoneclockpulse,01000101,11001010,Summary,Analog-to-DigitalConversionMethods,TheflashADC:

@#@,TheflashADCusesaserieshigh-speedcomparatorsthatcomparetheinputwithreferencevoltages.FlashADCsarefastbutrequire2n1comparatorstoconvertananaloginputtoann-bitbinarynumber.,Question,Howmanycomparatorsareneededbya10-bitflashADC?

@#@,Answer,1023,Summary,Analog-to-DigitalConversionMethods,Thedual-slopeADC:

@#@,1.Thedual-slopeADCintegratestheinputvoltageforafixedtimewhilethecountercountston.,2.ControllogicswitchestotheVREFinput.,-V,HIGH,HIGH,2.Afixed-sloperampstartsfromVasthecountercounts.Whenitreaches0V,thecounteroutputislatched.,Summary,Analog-to-DigitalConversionMethods,ThesuccessiveapproximationADC:

@#@,1.StartingwiththeMSB,eachbitinthesuccessiveapproximationregister（SAR）isactivatedandtestedbythedigital-to-analogconverter（DAC）.,2.Aftereachtest,theDACproducesanoutputvoltagethatrepresentsthebit.,3.Thecomparatorcomparesthisvoltagewiththeinputsignal.Iftheinputislarger,thebitisretained;@#@otherwiseitisreset（0）.,SAR,DAC,Vout,Parallelbinaryoutput,CLK,D0,D1,D2,D3,Serialbinaryoutput,Inputsignal,Comparator,（MSB）,（LSB）,Themethodisfastandhasafixedconversiontimeforallinputs.,Summary,Analog-to-DigitalConversionMethods,AnintegratedcircuitsuccessiveapproximationADCistheADC804.ThispopularADCisan8-bitconverterthatcompletesaconversionin64clockperiods（100ms）.,Summary,Analog-to-DigitalConversionMethods,Thesigma-deltaADC:

@#@,Withsigma-deltaconversion,thedifferencebetweentwosamplesoftheanaloginputsignalintegratedandquantized.Thedensityof1sattheoutputisproportiona