中英文文献翻译at89s52单片机应用大学论文.docx
- 文档编号:11759198
- 上传时间:2023-03-31
- 格式:DOCX
- 页数:15
- 大小:37.81KB
中英文文献翻译at89s52单片机应用大学论文.docx
《中英文文献翻译at89s52单片机应用大学论文.docx》由会员分享,可在线阅读,更多相关《中英文文献翻译at89s52单片机应用大学论文.docx(15页珍藏版)》请在冰豆网上搜索。
中英文文献翻译at89s52单片机应用大学论文
AT89S52MCUApplications
FunctionCharacteristicDescription
TheAT89S52isalow-power,high-performanceCMOS8-bitmicrocontrollerwith8Kbytesofin-systemprogrammableFlashmemory.ThedeviceismanufacturedusingAtmel’shigh-densitynonvolatilememorytechnologyandiscompatiblewiththeindus-try-standard80C51instructionsetandpinout.Theon-chipFlashallowstheprogrammemorytobereprogrammedin-systemorbyaconventionalnonvolatilememorypro-grammer.Bycombiningaversatile8-bitCPUwithin-systemprogrammableFlashonamonolithicchip,theAtmelAT89S52isapowerfulmicrocontrollerwhichprovidesahighly-flexibleandcost-effectivesolutiontomanyembeddedcontrolapplications.TheAT89S52providesthefollowingstandardfeatures:
8KbytesofFlash,256bytesofRAM,32I/Olines,Watchdogtimer,twodatapointers,three16-bittimer/counters,asix-vectortwo-levelinterruptarchitecture,afullduplexserialport,on-chiposcillator,andclockcircuitry.Inaddition,theAT89S52isdesignedwithstaticlogicforoperationdowntozerofrequencyandsupportstwosoftwareselectablepowersavingmodes.TheIdleModestopstheCPUwhileallowingtheRAM,timer/counters,serialport,andinterruptsystemtocontinuefunctioning.ThePower-downmodesavestheRAMcon-tentsbutfreezestheoscillator,disablingallotherchipfunctionsuntilthenextinterruptorhardwarereset.
PinDescription
VCC:
Supplyvoltage.
GND:
Ground.
Port0:
Port0isan8-bitopendrainbidirectionalI/Oport.Asanoutputport,eachpincansinkeightTTLinputs.When1sarewrittentoport0pins,thepinscanbeusedashigh-impedanceinputs.Port0canalsobeconfiguredtobethemultiplexedlow-orderaddress/databusduringaccessestoexternalprogramanddatamemory.Inthismode,P0hasinternalpull-ups.Port0alsoreceivesthecodebytesduringFlashprogrammingandoutputsthecodebytesdur-ingprogramverification.Externalpull-upsarerequiredduringprogramverification.
Port1:
Port1isan8-bitbidirectionalI/Oportwithinternalpull-ups.ThePort1outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort1pins,theyarepulledhighbytheinter-nalpull-upsandcanbeusedasinputs.Asinputs,Port1pinsthatareexternallybeingpulledlowwillsourcecurrent(IIL)becauseoftheinternalpull-ups.Inaddition,P1.0andP1.1canbeconfiguredtobethetimer/counter2externalcountinput(P1.0/T2)andthetimer/counter2triggerinput(P1.1/T2EX),respectively,asshowninthefollow-ingtable1.Port1alsoreceivesthelow-orderaddressbytesduringFlashprogrammingandverification.
Table1ThesecondfunctionoftheP1port
PortPin
AlternateFunctions
P1.0
T2(externalcountinputtoTimer/Counter2),clock-out
P1.1
T2EX(Timer/Counter2capture/reloadtriggeranddirectioncontrol)
P1.5
MOSI(usedforIn-SystemProgramming)
P1.6
MISO(usedforIn-SystemProgramming)
P1.7
SCK(usedforIn-SystemProgramming)
Port2:
Port2isan8-bitbidirectionalI/Oportwithinternalpull-ups.ThePort2outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort2pins,theyarepulledhighbytheinter-nalpull-upsandcanbeusedasinputs.Asinputs,Port2pinsthatareexternallybeingpulledlowwillsourcecurrent(IIL)becauseoftheinternalpull-ups.Port2emitsthehigh-orderaddressbyteduringfetchesfromexternalprogrammemoryanddur-ingaccessestoexternaldatamemorythatuse16-bitaddresses(MOVX@DPTR).Inthisapplication,Port2usesstronginternalpull-upswhenemitting1s.Duringaccessestoexternaldatamemorythatuse8-bitaddresses(MOVX@RI),Port2emitsthecontentsoftheP2SpecialFunctionRegister.Port2alsoreceivesthehigh-orderaddressbitsandsomecontrolsignalsduringFlashprogram-mingandverification.
Port3:
Port3isan8-bitbidirectionalI/Oportwithinternalpull-ups.ThePort3outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort3pins,theyarepulledhighbytheinter-nalpull-upsandcanbeusedasinputs.Asinputs,Port3pinsthatareexternallybeingpulledlowwillsourcecurrent(IIL)becauseofthepull-ups.Port3receivessomecontrolsignalsforFlashprogrammingandverification.Port3alsoservesthefunctionsofvariousspecialfeaturesoftheAT89S52,asshowninthefol-lowingtable2.
Table2ThesecondfunctionoftheP3port
PortPin
AlternateFunctions
P3.0
RXD(serialinputport)
P3.1
TXD(serialoutputport)
P3.2
(externalinterrupt0)
P3.3
(externalinterrupt1)
P3.4
T0(timer0externalinput)
P3.5
T1(timer1externalinput)
P3.6
(externaldatamemorywritestrobe)
P3.7
(externaldatamemoryreadstrobe)
RST:
Resetinput.Ahighonthispinfortwomachinecycleswhiletheoscillatorisrunningresetsthedevice.Thispindriveshighfor98oscillatorperiodsaftertheWatchdogtimesout.TheDISRTObitinSFRAUXR(address8EH)canbeusedtodisablethisfeature.InthedefaultstateofbitDISRTO,theRESETHIGHoutfeatureisenabled.
ALE/
:
AddressLatchEnable(ALE)isanoutputpulseforlatchingthelowbyteoftheaddressduringaccessestoexternalmemory.Thispinisalsotheprogrampulseinput(
)duringFlashprogramming.Innormaloperation,ALEisemittedataconstantrateof1/6theoscillatorfrequencyandmaybeusedforexternaltimingorclockingpurposes.Note,however,thatoneALEpulseisskippeddur-ingeachaccesstoexternaldatamemory.Ifdesired,ALEoperationcanbedisabledbysettingbit0ofSFRlocation8EH.Withthebitset,ALEisactiveonlyduringaMOVXorMOVCinstruction.Otherwise,thepinisweaklypulledhigh.SettingtheALE-disablebithasnoeffectifthemicrocontrollerisinexternalexecutionmode.
:
ProgramStoreEnable(
)isthereadstrobetoexternalprogrammemory.WhentheAT89S52isexecutingcodefromexternalprogrammemory,
isactivatedtwiceeachmachinecycle,exceptthattwo
activationsareskippedduringeachaccesstoexter-naldatamemory.
/VPP:
ExternalAccessEnable.
mustbestrappedtoGNDinordertoenablethedevicetofetchcodefromexternalprogrammemorylocationsstartingat0000HuptoFFFFH.Note,however,thatiflockbit1isprogrammed,
willbeinternallylatchedonreset.
shouldbestrappedtoVCCforinternalprogramexecutions.Thispinalsoreceivesthe12-voltprogrammingenablevoltage(VPP)duringFlashprogramming.
XTAL1:
Inputtotheinvertingoscillatoramplifierandinputtotheinternalclockoperatingcircuit.
XTAL2:
Outputfromtheinvertingoscillatoramplifier.
ProgramMemory
Ifthe
pinisconnectedtoGND,allprogramfetchesaredirectedtoexternalmemory.OntheAT89S52,if
isconnectedtoVCC,programfetchestoaddresses0000Hthrough1FFFHaredirectedtointernalmemoryandfetchestoaddresses2000HthroughFFFFHaretoexternalmemory.
DataMemory
TheAT89S52implements256bytesofon-chipRAM.Theupper128bytesoccupyaparalleladdressspacetotheSpecialFunctionRegisters.Thismeansthattheupper128byteshavethesameaddressesastheSFRspacebutarephysicallyseparatefromSFRspace.Whenaninstructionaccessesaninternallocationaboveaddress7FH,theaddressmodeusedintheinstructionspecifieswhethertheCPUaccessestheupper128bytesofRAMortheSFRspace.InstructionswhichusedirectaddressingaccesstheSFRspace.Forexample,thefollowingdirectaddressinginstructionaccessestheSFRatlocation0A0H(whichisP2).MOV0A0H,#data.Instructionsthatuseindirectaddressingaccesstheupper128bytesofRAM.Forexample,thefollowingindirectaddressinginstruction,whereR0contains0A0H,accessesthedatabyteataddress0A0H,ratherthanP2(whoseaddressis0A0H).MOV@R0,#data.Notethatstackoperationsareexamplesofindirectaddressing,sotheupper128bytesofdataRAMareavailableasstackspace.
WatchdogTimer
TheWDTisintendedasarecoverymethodinsituationswheretheCPUmaybesubjectedtosoftwareupsets.TheWDTconsistsofa14-bitcounterandtheWatchdogTimerReset(WDTRST)SFR.TheWDTisdefaultedtodisablefromexitingreset.ToenabletheWDT,ausermustwrite01EHand0E1HinsequencetotheWDTRSTregister(SFRlocation0A6H).WhentheWDTisenabled,itwillincrementeverymachinecyclewhiletheoscillatorisrunning.TheWDTtimeoutperiodisdependentontheexternalclockfrequency.ThereisnowaytodisabletheWDTexceptthroughreset(eitherhardwareresetorWDToverflowreset).WhenWDTover-flows,itwilldriveanoutputRESETHIGHpulseattheRSTpin.
InPower-downmodetheoscillatorstops,whichmeanstheWDTalsostops.WhileinPower-downmode,theuserdoesnotneedtoservicetheWDT.TherearetwomethodsofexitingPower-downmode:
byahardwareresetorviaalevel-activatedexternalinterruptwhichisenabledpriortoenteringPower-downmode.WhenPower-downisexitedwithhardwarereset,servicingtheWDTshouldoccurasitnormallydoeswhenevertheAT89S52isreset.ExitingPower-downwithaninterruptissignificantlydifferent.Theinterruptisheldlowlongenoughfortheoscillatortostabilize.Whentheinterruptisbroughthigh,theinterruptisserviced.TopreventtheWDTfromresettingthedevicewhiletheinterruptpinisheldlow,theWDTisnotstarteduntiltheinterruptispulledhigh.ItissuggestedthattheWDTberesetduringtheinterruptservicefortheinterruptusedtoexitPower-downmode.ToensurethattheWDTdoesnotoverflowwithinafewstatesofexitingPower-down,itisbesttoresettheWDTjustbeforeenteringPower-downmode.BeforegoingintotheIDLEmode,theWDIDLEbitinSFRAUXRisusedtodeterminewhethertheWDTcontinuestocountifenabled.TheWDTkeepscountingdurin
- 配套讲稿:
如PPT文件的首页显示word图标,表示该PPT已包含配套word讲稿。双击word图标可打开word文档。
- 特殊限制:
部分文档作品中含有的国旗、国徽等图片,仅作为作品整体效果示例展示,禁止商用。设计者仅对作品中独创性部分享有著作权。
- 关 键 词:
- 中英文 文献 翻译 at89s52 单片机 应用 大学 论文